STM32H7 and SYSCFG_UR2/3 register

[Uwe Bonnes]

RM0433 is very short about the SYSCFG_UR registers. Most URx registers are read-only and probably provides another view at the values of the options byte. The reason to provide another view is not clear to me. However UR2 (BOOT_ADDR0) and UR3 (BOOT_ADDR1) are read/write and imply that they have influence on the boot process. Are these registers perhaps only reset by power-on reset? Or is the read/write tagging an error?

Please clarify.

[Tesla DeLorean]

Well the register file can function at 400 MHz, the options bytes probably cannot. The presumption would be at start-up some state-machine or other busing loads the SYSCFG side copies, and then SCB->VTOR gets loaded based on the BOOT pin, before execution starts.

[Uwe Bonnes]

The option byte are already accessible in the Flash register file. So no obvious need to make them accessible one more time in the SYSCFG register file.

But the read/write option of BOOT_ADDR0 and BOOT_ADDR1 is much more interesting. Clarification (and not guessing) is welcome.