STM32H5 DMA Source burst length vs HAL_SPI_Receive_DMA `Size` argument.

[nunokisi]

Hello there!
I've been tinkering around with the STM32H5 and recently I've managed to setup the STM32H563 with SPI and DMA.

I'm now trying to understand what is the limit of the burst (either source or destination).  I'm using the DMA channel 4 (with a FIFO of 32 bytes) to receive the data coming from the SPI peripheral. Since this is my first time looking into the DMA, I thought the limit of data I could route through DMA was the FIFO size of 32 bytes. However, when I look into the RM section 16.4.10 about the GPDMA burst, I can see it supports up to 4 bytes * 64 ! In my understanding, this would mean DMA could route 256 bytes max at once. Am I mixing stuff up here?

When I try to read the max amount of bytes (4*64) the system doesn't work. It only works when the Size argument of `HAL_SPI_Receive_DMA` is less than the `DestBurstLength` setup inside the `HAL_SPI_MspInit`.

Here's the DMA configuration inside the HAL_SPI_MspInit:

 

handle_GPDMA1_Channel4.Instance = GPDMA1_Channel4;
handle_GPDMA1_Channel4.Init.Request = GPDMA1_REQUEST_SPI1_RX;
handle_GPDMA1_Channel4.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
handle_GPDMA1_Channel4.Init.Direction = DMA_PERIPH_TO_MEMORY;
handle_GPDMA1_Channel4.Init.SrcInc = DMA_SINC_FIXED;
handle_GPDMA1_Channel4.Init.DestInc = DMA_DINC_INCREMENTED;
handle_GPDMA1_Channel4.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_WORD; // SDW_LOG2[1:0]
handle_GPDMA1_Channel4.Init.DestDataWidth = DMA_DEST_DATAWIDTH_WORD; // DDW_LOG2[1:0]
handle_GPDMA1_Channel4.Init.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
handle_GPDMA1_Channel4.Init.SrcBurstLength = 64; // SBL_1[5:0]
handle_GPDMA1_Channel4.Init.DestBurstLength = 64; // DBL_1[5:0]
handle_GPDMA1_Channel4.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT1 | DMA_DEST_ALLOCATED_PORT0;
handle_GPDMA1_Channel4.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
handle_GPDMA1_Channel4.Init.Mode = DMA_NORMAL;

 

And here is my call in a non-blocking loop:

 

...
HAL_StatusTypeDef error = HAL_SPI_Receive_DMA(&hspi1, big_buffer, 64);
...

 

The above doesn't work, but if I change the HA_SPI_Receive_DMA Size to 63, it does. Any reason why?

[Foued_KH]

Hello @nunokisi , 

I think there is another condition which is the channel FIFO size, as we start a burst we need to have the data available or have enough FIFO space to store it .

Foued