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Associate III
August 29, 2026
Question

STM32G474 DAC DMA: Data Alignment Issue

  • August 29, 2026
  • 0 replies
  • 6 views

Hi,

I am using an STM32G474 DAC with DMA and TIM6 trigger.

My sine table is:

uint16_t sine_table[SINE_SAMPLES] =
{
2047, 2248, 2446, 2641, 2831, 3012, 3185, 3346,
3495, 3630, 3749, 3853, 3939, 4006, 4055, 4085,
4095, 4085, 4055, 4006, 3939, 3853, 3749, 3630,
3495, 3346, 3185, 3012, 2831, 2641, 2446, 2248,
2047, 1846, 1648, 1453, 1263, 1082, 909, 748,
599, 464, 345, 241, 155, 88, 39, 9,
0, 9, 39, 88, 155, 241, 345, 464,
599, 748, 909, 1082, 1263, 1453, 1648, 1846
};

I found that this configuration works:

Memory data alignment:      Half Word
Peripheral data alignment: Word

But this does not work:

Memory data alignment:      Half Word
Peripheral data alignment: Half Word

Why does the DAC require Word (32-bit) peripheral alignment even though the DAC data is only 12 bits?

Also, how do I know which peripheral requires Byte, Half Word, or Word DMA data alignment?

Is there a general rule or a specific register description I should look for in the reference manual?