STM32G431 Can't get DMA interrupts to trigger

[BTrem.1]

Hi All,

I please need your help as I have been stuck longer then I care to admit,

I have a STM32G431 48-pin device which I am using TIM8 for input capture with DMA. I have an external input (PC6) for Ch1 input and am using a software trigger for Ch3.

I have a couple problems, (1) The CCR1 is getting triggered but the corresponding DMA for DMA1_Channel1 is not being triggered and (2) I am using TIM8->EGR = TIM_EGR_CC3G to trigger a capture on CCR3 but CCR3 is not getting loaded.

Is TIM8->EGR = TIM_EGR_CC3G the correct code to trigger a CCR3 capture?

Attached is my main.c edited to reduce post length. I have a MX_DMA_Init() which enables the DMA1MUX clock and DMA1 clock as well as sets the IRQ priorities. DMA_Config configures the DMA parameters for TIM8 Ch1 and Ch3.

Before entering the while() loop I enable the CCER and set the DIER register.

 TIM8->DIER |= (TIM_DIER_CC3DE | TIM_DIER_CC1DE) ;

 /* enable TIM8 capture / compare */

 TIM8->CCER |= ( TIM_CCER_CC1E | TIM_CCER_CC3E ) ;

/* enable TIM8 */

 TIM8->CR1 |= TIM_CR1_CEN;

Am I overlooking something? I do notice the DMA1 SFR looks to be set properly but I notice the DMAMUX SFR is all zeros. Is this a problem? I'm attaching a snapshot of the TIM8 SFR values. The CNT and CCR1 get updated each run/stop but all other registers remain as shown.

 

[BTrem.1]

Attached file of main.c, edited for post length,

[BTrem.1]

Here is an update. In debug mode I am running a 200Hz logic signal into PC6 for TIM8_CH1 and internally in the main while() loop I am executing TIM8->EGR = TIM_EGR_CC3G  every 500ms. In the TIM8 registers I can see that CCR1 and CCR3 are getting loaded and the CC1F and CC3F flags are getting set. However, the ISR for DMA1_Channel1 and DMA1_Channel2 are not getting executed.

Am I correct that this seems to rule out TIM8 as the problem and my problem is somewhere in the DMA peripheral setup? I've collected the readings for registers DMA1 and DMAMUX and starting to analyze those to make sure I set up the DMA correctly.

[BTrem.1]

Another update and a request for help! I have had no responses.

I have looked at examples and have read the ref manual and the book "Mastering STM32" and can not track down my problem.

Succinctly, TIM8 flags CC1F and CC3F are getting set but the IRQ for DMA1_Channel1 and DMA1_Channel2 is not getting executed.

DMA is set-up, clocks are enabled, DIER is set and I started both channels using HAL_DMA_Start_IT()

I am including snapshots of the TIM8 reg, DMA1 reg and DMAMUX reg,

[waclawek.jan]

All DMAMUX registers are 0, it means that there's no routing set up there from TIM to DMA.

JW

[BTrem.1]

That lack of routing certainly does explain my problem. In the past when I set up DMA on this same device I don't recall having specific commands to set up DMAMUX?

I thought if I had the DMA set up with:

hdma_tim8_ch1.Instance = DMA1_Channel1;

along with other configuration settings and used HAL_DMA_Init() followed by using HAL_DMA_Start_IT() it would be set up.

Is there an explanation or examples how to set up DMAMUX using either HAL or LL ?

I have been using the ### How to use this driver ### notes in the file stm32g4xx_hal_dma.c

I do appreciate your response,

Thanks,

Brian

[waclawek.jan]

> Is there an explanation or examples how to set up DMAMUX using either HAL or LL ?

I don't use Cube, but for simple routing, as is your case, it's enough to set the source number into the respective DMAMUX_CxCR.DMAREQ_ID - see DMAMUX chapter, for numbering of sources see the DMAMUX: assignment of multiplexer inputs to resources table at the beginning of that channel.

There's one gotcha - DMA channels numbering starts at 1 while DMAMUX channels are numbered starting at 0, so DMA1_Channel1 is set in DMAMUX_C0CR. Unfortunately, the way how these registers are defined in the CMSIS-mandated is extraordinarily idiotic, so you have to use something like DMAMUX1_Channel0->CCR.

JW

[BTrem.1]

Thank you so much for the valuable info!! I was not setting up the DMAMUX, not realizing it was needed. After setting up the peripheral and the DMA channels I for now added these two lines:

/** setup the DMAMUX **/

LL_DMAMUX_SetRequestID(DMAMUX1, 0, LL_DMAMUX_REQ_TIM8_CH1);  // #49

LL_DMAMUX_SetRequestID(DMAMUX1, 1, LL_DMAMUX_REQ_TIM8_CH3);  // #51

The code now executes the IRQ for DMA1_Channel1 and DMA1_Channel2 in response to TIM8_CH1 and TIM8_CH3

I think my log jam is unblocked for now.

Thank you again,

Brian