STM32G0: Changes DBGMCU behaviour

[Uwe Bonnes]

Hello,

STM32G0 DBGMCU->CR does not have a DBGMCU_CR DBG_SLEEP bit. Does that mean that Debug is possible even when the CPU is sleeping?

Otherwise the write behaviour changed also: Write is only possible during reset. I.m.h. opinion, this defeats a hot debugger plug to a device mostly in Stop/Standby. Before, hammering halt commands until some halt command catched the device when awake, allowed to set DBGMCU->CR. The normal debug could continue.

Now write only under Reset erases program state.

What a pity.

[Imen Ezzine]

Hi Uwe Bonnes,

You are correct, for STM32G0 there is only stop and standby bits (no DBG_ Sleep bit in DBG_CR). So in this case yes debug is possible even when the CPU is sleeping.

Nevertheless sometimes even with the existence of DBG_SLEEP bit, Debugging is permitted whether this bit is set or not. This behavior has been seen with other stm32 devices such us STM32H72xx-3xx when entering Sleep mode did not impose any restrictions on the standard debug features.

For the stop/standby mode, all debug components in these domains should be inaccessible to the debugger. To avoid this, the emulation is enabled for a domain via the DBGMCU_CR register so that its clock and power are maintained. In other words, the domain behaves as if it is in power saving mode, while the debugger does not lose the connection. But in order to re-enter the debug mode again (next connection to target), this is only allowed when setting the reset mode to be under reset.

-Imen