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Bill Finger
Associate II
Sep 27, 2019 12:45 PM UTC
Solved

STM32F7 Thermal Reset

We have had trouble with a STM32F7769BGT6 resetting when heated to around 45°C. The part should be rated for 85°C, as are the rest of the components on our board. We've looked at the power supplies and they don't show any issues. To duplicate the problem, we heat the uC directly with a hot-air gun. Heating other components does not reproduce the issue, but heating the uC immediately causes the reset behavior.

Has anyone seen anything like this before?

(edit) To add some more information, we just performed an experiment, and it appears that bit 30 on one or more of the core CPU registers is switching from a 1 to a 0. Because the register is holding a memory address, the new incorrect address causes a bus fault.

This topic has been closed for replies.
Bill Finger
Bill FingerBest answer
Associate II
Jan 15, 2020 1:03 PM UTC

In the end, we reduced the clock core frequency to 200 MHz, and the problem disappeared. I recommend using this frequency for any product that must operate over the full temperature range. In fact, since 216 is only 8% larger than 200 MHz, I recommend 200 MHz for all applications.

16 replies

Danish1
Lead III
Sep 27, 2019 7:46 PM UTC

How strongly do you know you’re running within the specifications laid down in the data-sheet and reference manual?

I mean things like having sufficient wait-states and core voltage for the processor speed. Or PLL numbers.

Transistor characteristics change with temperature. Things that work rock-solidly at one temperature might fall over at a different one.

I must admit I don’t know if this is the problem, but it’s something to check.

Bill Finger
Associate II
Oct 2, 2019 8:01 PM UTC

I'm pretty meticulous in my designs. I'm using 7 wait states; the datasheet suggests 6 might be possible. The PLL is set: M=25, N=432, P=2, Q=9, R=7. 25 MHz input crystal.

I might experiment with M, though, now that you mention it. It is within specifications, but the N of 432 is right on the hairy edge. Thanks.

Piranha
Principal III
Sep 28, 2019 5:40 PM UTC

Have you tested this on more than one board and chip?

Bill Finger
Associate II
Sep 30, 2019 3:05 PM UTC

Not yet, but we should have another board to test this week.

waclawek.jan
Super User
Sep 28, 2019 7:06 PM UTC

Internal temperature of the chip is higher than the temperature of its package.

What's the system clock? What's VDD? What VCAP capacitors are used, what's the internal voltage regulator setting? Check, double check and measure VCAP voltages, cold and also under the heating.

Review power supply paths, grounding arrangement. Check and double check if all VDD/GND (and VCAP of course) pins are soldered rock solid.

Can you perform the test on a "known good" board, such as Nucleo or Disco?

JW

Bill Finger
Associate II
Oct 2, 2019 7:48 PM UTC

> What's the system clock?

216 MHz

> What's VDD?

3.3V

> What VCAP capacitors are used?

Two AVX 12105C225KAT2A, 2.2uF 50V X7R 1210 package.

> What's the internal voltage regulator setting?

Power Scale 1.

> Check, double check and measure VCAP voltages, cold and also under the heating.

This is a good idea. We will do this and report back.

Pavel A.
Oct 3, 2019 12:15 AM UTC

So you've added that bit 30 in some register flipped and this is actually causing fault in your code, correct?

Which register? How the code relates to its value? Is it a pointer or index?

-- pa

Bill Finger
Associate II
Oct 3, 2019 12:07 PM UTC

Pavel,

The register is R0. When the fault occurs, the register has just been loaded with a memory address 0xCxxx'xxxx, which would be on external memory. However, because of the bit flip the address becomes 0x8xxx'xxxx, which is nowhere and causes the bus fault when the address is loaded.

Ozone
Principal
Oct 3, 2019 12:28 PM UTC

Might be interesting to see if the observed fault disappears with reduced core clock frequency.

I have not much experience with F7 models, but I never observed noticeable heat generation (high power dissipation) with similar F4 models.

Bill Finger
Associate II
Oct 7, 2019 7:02 PM UTC

By reducing the system clock rate to 200 MHz, were able to pass the thermal testing requirements. It appears that this part, at least in the configuration we are using it, is not truly rated for the full clock frequency over the full temperature range.

Chris1
Associate II
Oct 7, 2019 7:39 PM UTC

Interesting / surprising footnote in the data sheet: "216 MHz maximum frequency for 6 suffix version (200 MHz maximum frequency for 7 suffix version)."

Guess you have a 7 suffix device.

Bill Finger
Associate II
Oct 7, 2019 8:05 PM UTC

Actually, no, I don't. The suffix 7 devices are unavailable in this package.

Bill Finger
Bill FingerAuthorBest answer
Associate II
Jan 15, 2020 1:03 PM UTC

In the end, we reduced the clock core frequency to 200 MHz, and the problem disappeared. I recommend using this frequency for any product that must operate over the full temperature range. In fact, since 216 is only 8% larger than 200 MHz, I recommend 200 MHz for all applications.