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Mike Rosing
Associate III
December 9, 2017
Solved

stm32f7 FMC async trouble

  • December 9, 2017
  • 4 replies
  • 921 views
Posted on December 09, 2017 at 16:43

I have set up the FMC with the following:

  /* Initialize the SRAM controller */

  RCC->AHB3ENR |= 1;  // turn on FMC

  BSP_LED_Toggle(LED3);

  FMC_Bank1->BTCR[0] = 0X00001081;

  FMC_Bank1->BTCR[1] = 0X00070607;

/*  initialize FMC I/O bus  */

  RCC->AHB1ENR |= 0X78;  //    turn on D, E, F and G

  BSP_LED_Toggle(LED3);

  GPIOD->MODER =  0xa000080a;

  GPIOD->AFR[0] = 0x00c000cc;

  GPIOD->AFR[1] = 0xcc000000;

  GPIOE->MODER =  0x002a8000;

  GPIOE->AFR[0] = 0xc0000000;

  GPIOE->AFR[1] = 0x00000ccc;

  GPIOF->MODER =  0xaa000aaa;

  GPIOF->AFR[0] = 0x00cccccc;

  GPIOF->AFR[1] = 0xcccc0000;

  GPIOG->MODER =  0x0000002a;

  GPIOG->AFR[0] = 0x00000ccc;

I am only using the NWE signal to latch data into an FPGA.  The bus speed is slow, with 21 clocks per transaction.  When it sends data, the timing looks ok.  The problem is there is no data transmitted until the address gets into the range of 0xa00.  The data on the data bus seems ok because sending 0x69 shows up on the data bus correctly when viewed on a 'scope.

I tried turning off the FIFO, but it did not make any difference.  The address bus is firing, but no data comes out for addresses below a certain point.  Since data does come out, the FMC seems to be set up correctly - but why is there no data below a certain point?

Mike

#fmc #async
This topic has been closed for replies.
Best answer by waclawek.jan
Posted on December 09, 2017 at 20:02

Cache?

JW

4 replies

waclawek.jan
waclawek.janBest answer
Super User
December 9, 2017
Posted on December 09, 2017 at 20:02

Cache?

JW

Mike Rosing
Associate III
December 9, 2017
Posted on December 09, 2017 at 21:14

Good idea to look at - I am not familiar with how the FMC would react with that.  But it seems more address related - when I start at 0x000 I see lots of address toggling on the FMC address lines and not data for a long time.  When I start at 0xa00 the data starts toggling within 32 or so addresses.  I have not read up on the cache, sounds like a good thing to check out.

Mike