STM32F42x/STM32f43x SAI DMA FIFO errors

[chris239955]

Posted on January 16, 2014 at 07:24

Hello,

I have been working with an STM32F27 in an audio application. I am using the SAI module with both blocks. Block A is a master RX block, block B is a slave TX block synchronized to block A. The interface is standard phillips I2S with 32 bits per channel.

I am following the order suggested in the reference manual and enabling the DMA before the SAI. And, enabling the slave before the master.

The error I get is that as soon as I enable one of the SAI blocks, I get a fifo error (DMA_FLAG_FEIF4) from the DMA. This flag is set once and only once. If I simply clear this flag once and continue, it will not be seen again. I have the DMA in FIFO disabled mode. I tried playing around with the FIFO configuration for both the DMA and SAI block, but have not been able to get different results.

I have the easy work-around of just clearing that flag the first time it pops up. However, I am uncertain why this error is occuring.And, I lost half a day trying to figure out what was wrong before I just decided to try seeing if it was a persistent error.

Has anybody else encountered this kind of behavior, or are there any STM people out there who can comment on this?

[Amel NASRI]

Posted on January 27, 2014 at 10:31

Hello Chris,

Here there is no code given for review but I assume that you are enabling the peripheral request before the DMA stream. In such case, the FIEF flag will be set.

The workaround in such case is to simply inverse commands order.

Even if it is disabled, the FIFO is used to anticipate transfer of only the first unit of data from memory to peripheral.

If you are not in these same conditions, please share the minimum of complete code that we can check.

-Mayla-

[waclawek.jan]

Posted on January 27, 2014 at 13:52

Oh, but this is a surprising behaviour, and quite an important information!

I've seen this and been caught with surprise, and not only I:

https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=https%3a%2f%2fmy.st.com%2fpublic%2fSTe2ecommunities%2fmcu%2fLists%2fcortex_mx_stm32%2fSTM32F2xx%20SPI%20DMA%20FIFO%20error&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=287

https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=%2Fpublic%2FSTe2ecommunities%2Fmcu%2FLists%2Fcortex_mx_stm32%2FSTM32F42xSTM32f43x%20SAI%20DMA%20FIFO%20errors&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=23

Mayla, couldn't you please get this information somehow into the next release of the STM32F2xx and STM32F4xx Reference Manuals?

Thanks,

Jan Waclawek