STM32F429 ADC sampling time Question

[Kang Sung Gu]

Posted on October 29, 2017 at 13:23

Smapling Time > 15 cyclese if setting 15 ADC Clock cycles ??

[S.Ma]

Posted on October 29, 2017 at 14:12

I guess so because the ADC needs a sample and hold time (capture and charge a sampling capacitor) followed by a conversion (which takes more time when resolution increases as it is a binary search -SAR-). When in doubt, look at the ADC in the reference manual for the chosen STM32.

[Kang Sung Gu]

Posted on October 30, 2017 at 01:32

Thank you