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Tobias Wedell
Tobias Wedell
Associate II
January 8, 2018
Solved

STM32F415RGT ART Accelerator

  • January 8, 2018
  • 2 replies
  • 1904 views
Posted on January 08, 2018 at 14:32

Hello,

in your first project we use a STM32F415ZGT without any problems. Then we switch to the smaller version STM32F415RGT in a new design. With the same source code we got some times a hard fault when die MCU is booting up.

After two or three days of software and hardware bug finding and trying different versions of CubeMX and F4 firmware we find a solution to disable the Instruction Cache in CubeMX:

0690X00000609DvQAI.png

After that your simple LED blink code runs fine without any hard fault.

Errata sheet lists a bug in Revision ''A'' devices for the ART Accelerator:

ART Accelerator prefetch queue instruction is not supported

 

 

Description

The ART Accelerator prefetch queue instruction is not supported on revision A devices.

This limitation does not prevent the ART Accelerator from using the cache enable/disable

capability and the selection of the number of wait states according to the system frequency.

Workaround

   �

Revision A devices: none

   �

Revision Z and 1 devices: fixed.

We found out that your STM32F415RGT is at Revision ''2'' and that revision is not listed in fixed devices.

Is this bug still existing in Revision ''2'' devices? And when not: Do you have any solution to your problem?

Best regards

#vssa #gnd #ferrite-beads #vss
    This topic has been closed for replies.
    Best answer by waclawek.jan
    Posted on January 08, 2018 at 17:16

    I'm not sure I'd put beads between the grounds; but I'm sure if I'd do that I'd put the capacitors *after* the beads, directly onto the mcu VSS pins. Most of them at least; and certainly those on VCAP pins.

    Can you please try bypassing those beads?

    2 replies

    Tesla DeLorean
    Tesla DeLorean
    Guru
    January 8, 2018
    Posted on January 08, 2018 at 15:11

    What does DBGMCU->IDCODE report?

    What frequency and wait states are being used?

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    Tobias Wedell
    Tobias WedellAuthor
    Associate II
    January 8, 2018
    Posted on January 08, 2018 at 15:42

    IDCODE = 0x10076413

    SYSCLCK = 168 MHz

    WS = 5 (6 CPU cycle)
    waclawek.jan
    waclawek.jan
    Super User
    January 8, 2018
    Posted on January 08, 2018 at 16:23

    Is the supply voltage 3.3V and is it stable and well-decoupled? What's the voltage on the two VCAP pins, are they properly connected? Is PWR_CR.VOS=1 all the time? Are all GND/VCC pins connected properly, including the analog ones and VBAT?

    JW

    Tobias Wedell
    Tobias WedellAuthor
    Associate II
    January 17, 2018
    Posted on January 17, 2018 at 13:56

    Hi,

    the problemwere theferrite beads in the VSS and VSSA lines. Bridged them and all is working fine. Many thanks to

    Waclawek.Jan

    for the hint.

    I leave the VCAP capacitor as it is at 2.2µF.

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