[STM32F411RE] I2S - Keep MCLK (WS) and SCK clocks running.
Hi,
I'm using the STM32F411RE device to decode MP3 audio files, i'm sending the decoded data to a MAX98357A amplifier via I2S and DMA, when the SCK signal is removed from the amplifier there's a DC offset at it's output which is causing a distorted audio output and a current peak, to avoid it i have two options:
- Keep SCK and WS running, (keep only WS running if possible).
- Disable the amplifier via I2S_SHTDWN before removing SCK and WS.
Is it possible to configure the I2S peripheral to keep SCK and WS running even when i'm not sending data? If it's not possible i can try to send 0's until i got decoded data so both SCK and WS keep running but i would prefer to avoid it.
Any ideas?
Image showing both SCK and WS stopping when there's no more data to send, this capture shows sending a whole audio slip to the amplifier.

Similar issue, not solved here.
