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mcufan
Associate II
July 19, 2019
Solved

stm32f411 spi4 low clock speed

  • July 19, 2019
  • 15 replies
  • 4277 views

Hello!

I have problem with spi4 clock speed. I want to drive a lcd tft display but spi clock is max 500Khz, baudrate prescaler set to SPI_BAUDRATEPRESCALER_2. Is very weird. Initial setup was made with CubeMX to 48Mbit/s. APB2 clock is set to 96Mhz. I tried with dma, and without hal but the speed remains the same

What is the cause of this very low spi clock output speed?

This topic has been closed for replies.
Best answer by waclawek.jan

As you can see, although PLL is switched on in CR, PLLCFGR is at its default value; nonetheless your system clock is set to HSI in CFGR, and both APB dividers are set to 16 (maximum).

In other words, you don't run the SystemClock_Config() function as you've presented us above. Find out, how do you actually set the clocks.

JW

15 replies

Tesla DeLorean
Guru
July 19, 2019

Your clocks are wrong?

printf("%d\n", SystemCoreClock);

Output internal clock via MCO/PA8 and scope that against SPI Clock, and attach.

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mcufan
mcufanAuthor
Associate II
July 19, 2019

Is not wrong. HSE_VALUE = 8000000

i check with assert in early main. The SystemCoreClock is 16000000 but not think is a problem, if i set to 8000000 the spi working the same

Tesla DeLorean
Guru
July 19, 2019

 printf("HCLK=%d\n", HAL_RCC_GetHCLKFreq());

 printf("APB1=%d\n", HAL_RCC_GetPCLK1Freq());

 printf("APB2=%d\n", HAL_RCC_GetPCLK2Freq());

Make sure to clear the initialization structures for the SPI4

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mcufan
mcufanAuthor
Associate II
July 20, 2019

with printf:

HCLK=16000000

APB1=1000000

APB2=1000000

what do you mean clear the initialization structures for the SPI4?

Tesla DeLorean
Guru
July 20, 2019

So SPI4 clock half of APB clock. Not sure why we are at 1 MHz for those.

= {0​}; // clears auto variables on stack

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mcufan
mcufanAuthor
Associate II
July 20, 2019

here my clock config:

void SystemClock_Config(void)

{

 RCC_OscInitTypeDef RCC_OscInitStruct = {0};

 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

 /**Configure the main internal regulator output voltage 

 */

 __HAL_RCC_PWR_CLK_ENABLE();

 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

 /**Initializes the CPU, AHB and APB busses clocks 

 */

 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;

 RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;

 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;

 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;

 RCC_OscInitStruct.PLL.PLLM = 4;

 RCC_OscInitStruct.PLL.PLLN = 192;

 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;

 RCC_OscInitStruct.PLL.PLLQ = 8;

 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)

 {

  Error_Handler();

 }

 /**Initializes the CPU, AHB and APB busses clocks 

 */

 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK

               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;

 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;

 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;

 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;

 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)

 {

  Error_Handler();

 }

 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;

 PeriphClkInitStruct.PLLI2S.PLLI2SN = 200;

 PeriphClkInitStruct.PLLI2S.PLLI2SM = 5;

 PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;

 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)

 {

  Error_Handler();

 }

}

waclawek.jan
Super User
July 20, 2019

> spi clock is max 500Khz,

And you know that how?

JW

mcufan
mcufanAuthor
Associate II
July 20, 2019

no idea..

the HAL_RCC_GetPCLK2Freq() give me 1000000Hz

very strange..

waclawek.jan
Super User
July 20, 2019

And what's the actual SPI clock, as measured on the SCK pin?

JW

waclawek.jan
Super User
July 20, 2019

Read out and check/post the relevant RCC register's content.

Do you use any bootloader?

JW

mcufan
mcufanAuthor
Associate II
July 20, 2019

I use stm32f411 disco board, the actual spi clk frequency measured with logic analyzer is exactly 500Khz

mcufan
mcufanAuthor
Associate II
July 20, 2019

I use stm32f411 disco board. The spi sck pin freq. is 500khz measured with logic analyzer