STM32F407IG Ground pins

[shlomo]

Posted on November 04, 2015 at 13:14

In document DocID022152 Rev 5, pinouts , Figure 16 (STM32F40x UFBGA176 ballout)- all the pins in lines F6-F10...K6-K10 is marked as VSS.

But, in the following pinouts table, Table 7 (TM32F40x pin and ball definitions), in the coulmn of UFBGA176, I didn't find that pins at all.

In addition, In document DocID026304 Rev 3 , Figure 26. STM32F407IG(H6) microcontroller reference schematic - Also that pins is not exist.

Is that pins connected to VSS or not?

[waclawek.jan]

Posted on November 04, 2015 at 14:47

This is similar question to [DEAD LINK /public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/STM32F301K8U6%20thermal%20pad%20connect%20to%20GND&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=30]that on thermal pad on QFN package - both should've been answered in the datasheet.

You might want to have a look at the

http://www.st.com/web/en/catalog/tools/PF252216

board's gerber files.

JW

[shlomo]

Posted on November 04, 2015 at 15:11

Thanks.

Sorry, but I don't understand the relation between thermal pad of QFN and balls of BGA.

Do you mean that all that pins is only for thermal dissipation? and the mark VSS is only recommendation?

[Tesla DeLorean]

Posted on November 04, 2015 at 18:26

You'd have to look inside the symbol definition itself, some time connectivity is hidden in there. So look at the symbol, and look at the net list.

What's the problem just punching the pad down to the ground plane? Do you have rules against pin-in-pad?

[waclawek.jan]

Posted on November 04, 2015 at 23:22

> Sorry, but I don't understand the relation between thermal pad of QFN and balls of BGA.

I would be surprised if those ''middle'' balls would not serve the very same purpose as the QFN thermal pad - I guess they are connected to the pad where the chip itself is mounted, i.e. they connect to the underside of the chip (unless the chip is mounted in an electrically isolated way).

> Do you mean that all that pins is only for thermal dissipation? and the mark VSS is only recommendation?

Yes, but my opinion is not binding of course... :) JW