STM32F407 FSMC To NOR Flash Issue

[shane]

Posted on January 04, 2015 at 08:41

The original post was too long to process during our migration. Please click on the attachment to read the original post.

[shane]

Posted on January 04, 2015 at 18:05

I've also attached the schematic to show the components involved besides STM32F407 and the external flash, which includes a single inverter and a 16 bit D-latch. The board also uses an external crystal andmy thought is that will complicate the setting of the FSMC timing (ADDRSET, ADDRHLD, and DATASET), which isn't properly set at this time.

This is the first timewe areusing the external flash on this board with STM32F4 so both the HW and SW have not been proven to work as far as FSMC goes. The only tool I have is the JTAG and a 2 channel oscope. I'm curious at this point if my problem is related to FSMC timing or something else so I can zero in on it. Any suggestions would be greatly appreciated.

________________

Attachments :

schematic.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0XI&d=%2Fa%2F0X0000000bdI%2Fu7fMYIEriWVQU9LTiIsFubSCYoV6Y1ZmuRN2jCvuzAo&asPdf=false

[shane]

Posted on January 04, 2015 at 19:55

Update:

One thing I forgot to mentioned is that PG6 on the processor is connected to /EXT_LATCH_OE on the 16-bit D Latch.  I have just configured PG6 to AF FSMC thinking that the FSMC subsystem will take care the rest but still I cannot get the MFR and device ID.

[waclawek.jan]

Posted on January 05, 2015 at 11:45

#define sysAddress(offset) ((volatile WORD *)(system_base + (((WORD)offset)<<1))) //For ARM CPU

Are you sure with the <<1 ?

JW

[shane]

Posted on January 05, 2015 at 16:39

When I tried with and without <<1 my MFR ID is 0xFF.  I copy/pasted that line of code from the Microchip driver and modified ''system_base'' accordingly:

#define sysAddress(offset) ((volatile WORD *)(system_base + (((WORD)offset)<<1))) //For ARM CPU

[shane]

Posted on January 31, 2015 at 00:23

Update:

I resolved my previous NOR FLASH by disabling the chip select line that is connected to the external RAM, which is also on my custom board.  Since I don't need to use the external RAM at the moment, I forgot to disable its chip select which was interfering when I try to access the external FLASH.

On to my next problem:)  For some reason, I cannot access the external FLASH region beyond 64KB.  I configured A16 (PD11), A17 (PD12), A18 (PD13), and A19 (PE3) to AF_FSMC but I don't see any activity on those lines on the oscope when I access the memory region at 0x64010000 (for example).  Any input would be appreciated and my FSMC configuration code is posted below:

void ExtFlash_Init(void)

{

 FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;

 FSMC_NORSRAMTimingInitTypeDef  p;

 GPIO_InitTypeDef GPIO_InitStructure;

 

 RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);

 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOG, ENABLE);

 // address lines

 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |

       GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;

 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;

 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);

 GPIO_Init(GPIOD, &GPIO_InitStructure);

 // address lines (continue)

 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |

       GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;

 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

 GPIO_PinAFConfig(GPIOE, GPIO_PinSource3, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOE, GPIO_PinSource7, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOE, GPIO_PinSource8, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOE, GPIO_PinSource9, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOE, GPIO_PinSource10, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOE, GPIO_PinSource11, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOE, GPIO_PinSource12, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOE, GPIO_PinSource13, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOE, GPIO_PinSource14, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOE, GPIO_PinSource15, GPIO_AF_FSMC);

 GPIO_Init(GPIOE, &GPIO_InitStructure);

 /* External memory OE (#4 for reading from flash) and WE (#5 for writing to flash) */

 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;

 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);

 GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);

 GPIO_Init(GPIOD, &GPIO_InitStructure);

 /* External memory CS2 (for selecting the flash part to interact) */

 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;

 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

 GPIO_PinAFConfig(GPIOG, GPIO_PinSource9, GPIO_AF_FSMC);

 GPIO_Init(GPIOG, &GPIO_InitStructure);

// EXT_LATCH_OE

 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;

 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;

 GPIO_Init(GPIOG, &GPIO_InitStructure);

// Disable CS1 for now

 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;

 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;

 GPIO_Init(GPIOD, &GPIO_InitStructure);

 GPIOD->BSRRL = (1<<7);

 // NADV pin

 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;

 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

 GPIO_PinAFConfig(GPIOB, GPIO_PinSource7, GPIO_AF_FSMC);

 GPIO_Init(GPIOB, &GPIO_InitStructure);

 // External memory WAIT (to get status from the flash part)

 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;

 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;

 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;

 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

 GPIO_Init(GPIOD, &GPIO_InitStructure);

 // FSMC Configuration

 p.FSMC_AddressSetupTime = 0x07;   // 0 to 15 (table 215 p1529)

 p.FSMC_AddressHoldTime = 0x04;   // 1 to 15 (table 215 p1529)

 p.FSMC_DataSetupTime = 0x09;   // 1 to 256 (table 215 p1529)

 p.FSMC_BusTurnAroundDuration = 0x00; // 0 to 15 (table 215 p1529)

 p.FSMC_CLKDivision = 0x00;    // don't care (p.1548)

 p.FSMC_DataLatency = 0x00;    // don't care (p.1548)

 p.FSMC_AccessMode = 0x00;    // don't care (p.1560) only used during EXTMOD

 // configured according to p1547

 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;

 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;      // disable or 0

 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;   // if if memory supports it; otherwise 0

 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;     // disable or 0

 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;      // disable or 0

 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;     // as needed?

 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; // don't care

 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;       // disable or 0

 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;   // meaningful only if AsynchronousWait is 1

 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;    // disable or 0

 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;     // as needed

 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;       // 0x2 (NOR Flash memory)

 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Enable;     // enable or 1

 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;

 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

 /*!< Enable FSMC Bank1_NOR Bank */

 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);

}