STM32F334 - ADC1 returns large output with grounded input

[Amampondo]

Hello

on the a.m. device I use both ADC1 and ADC2. The initialization is identical on both.

I notice that results fluctuate widely at ADC1 output and reasonably at ADC2 output.

Grounding ADC1 input leads to 330-345 LSB.

Vdda = 2.5V from precise external reference, which is 610uV/LSB.

Source resistance at input is 10R, capacitor is 1nF.

Setting ADC1 to 60mV input results in 580-620 LSB, but only 100 LSB are expected.

Changing ADC clock from 32MHz to 16 MHz changes output of ADC1 to 710-740 LSB

(while the ADC2 outputs are not affected).

Am I missing some details in the initialization? Some setting required on ADC1 with are not needed on ADC2?

Configurations are single conversion, SW triggered, sequencing disabled, regular conversion, single ended inputs. All initialization code is done by STM32CubeIDE, using LL drivers for the ADCs.

Calibration is done prior to starting calibration.

Any idea is welcome - thanks.

[waclawek.jan]

STM32F334 in which package? And which pin is ADC1 input? What is connected to that pin (including checking for shorts to neighbouring pins/tracks)?

Is this a "known good" hardware like Nucleo/Disco or your own board? Are all VSS pins connected correctly (and that involves checking for bad solder joints), including VSSA?

What sampling period is set set? What happens if you increase it?

Did you measure the 60mV directly on the pin, with ground lead of metering device placed directly on VSSA pin?

JW

[Amampondo]

Hello Jan

thanks for your fast reply.

Package = QFN32, ADC input channels = channel 1, Pins 7 + 11

HW is self-made.

Voltmeter is connected as you describe: short leads directly on ADCs input cap.

I checked on a third piece of HW, which, surprisingly, works well.

Focus changes from FW to HW now.

Can it be that something is floating (bad soldering) but ADC2 is not affected?

I will report when solution is found.

TG

[Amampondo]

Update and observation:

On my HW, Vdda has a level of 2.5V from an external reference.

ADC_IN1, once disconnected from everything and thereby floating, is sourcing (!) 2.9V with about 22uA of current. With 10k to GND, 220mV of voltage is sourced.

This observation gave me the clue.

Connecting Vdda to 3V3, like Vdd, alleviates all strange behavior.

Chap. 6.2 absolute max ratings says:

The difference of Vdd-Vdda is specified to 0.4V (max).

(the difference is 0.8V in my HW - rework is ahead).

Operating conditions chap. 6.3.1 says:

"Vdda must be equal to or higher than Vdd"

Suggestion for the Datasheet, Maximum Ratings:

Vdda(min) = (Vdd < 2V4) ? 2V0 : (Vdd-0V4);

read: Vdda(min) should be 2V0 or (Vdd-0V4), whichever is larger.

I noticed that the BGA Package has a dedicated Vref+ connection on F7 (separate from Vdda).

But Chap 6.3.19 does not specify in which range Vref+ can be operated. Only Vref- is specified.