stm32f303rc: SRAM parity error bit NOT SET, but NMI is taken

[USeid.1]

SRAM parity check is enabled. In fact, breakpoint in NMI is reached.

But SYSCFG_CFGR2.SRAM_PEF bit is NOT set. See .png.

Disassembly (at bottom) shows, that address of CFGR2 is loaded at R0 ("Registers" to the right) and its contents is loaded to R1. There is no PEF bit set !

Is this a known bug or am I wrong ?

Cross check: if SRAM parity check is disabled, NMI is never taken.

[waclawek.jan]

Do you have enabled SYSCFG clock in RCC_APB2ENR?

JW

[USeid.1]

Very good hint ! It is, but not at the early point of execution, where the NMI occurs.:astonished_face:

Thank you very much !