STM32F207 ETH clock

[kruzicka]

Posted on May 14, 2014 at 11:54

Hello, I've problem with a clock setting for a MCU. There is some points, which describe it.

General: MCU: STM32F207IGT6

Clock: HSE 8Mhz -> PLL 96Mhz

Using module: ETH MAC - MII 4-bit mode - 25MHz needed

FSMC - synchro NOR FLASH mode - 24Mhz must be for a device

Using external device: ETH PHY switch - 88E6060 - own 25Mhz clock – on ETH MAC MII

                                            MVBCS1 - 24Mhz (must be, not configured) on FSMC

 Problem: I want to use ETH MAC MII (STM) with ETH PHY switch (88E6060) in MII mode. In this mode, pin TX_CLK and RX_CLK for MII on STM32F207 are as inputs. ETH PHY switch has own clock (external crystal rezonator 25Mhz) and generate clock TX_CLK and RX_CLK for STM32F207. I mean, there is no problem with STM32F207 clock, which is 96Mhz (no divisible 25Mhz). But In this case can be problems with synchronization. In datasheet and reference manual or in forum are not informations for this case. Im not sure with synchro and I need know it without fail

Thanks for a reply

[waclawek.jan]

Posted on May 14, 2014 at 12:16

Don't worry, the ETH clock does not need to be synchronous with the AHB/core/any-other-internal clock. The only requirement is, that the AHB clock must be at least 25MHz (see RM0033, ch.28.4).

JW

[kruzicka]

Posted on May 19, 2014 at 15:47

Thanks a lot

Karel Ruzicka