STM32F2 SWD debug impossible [SOLVED]

[debbiojump]

Posted on January 16, 2013 at 23:42

Hi at all,

I read swd related post in this forum but i'm still unable to start debugging on stm32f2 chip through SWD interface. 

I tried with ST-LINK V2 and with SEGGER J-LINK (supporting swd), more o less with same result.

I got an SWD connector with vdd,gnd,swdio,swclk.

NRST is not connected ( i suspect i need it ..)

No pull up or pull down on swdio pin.

I got the same issue on 3 different boards.

I set swdio and swclk as alternate 0.

I can write chip flash only with BOOT 0 set to High..

Program on flash act correctly.

I use the same scheme for other family chip like stm32l1 with no issues..

So maybe i miss some pin configuration or swj register(does it exists on stm32f2?) or the lack of nrst pin connected to debugger is the cause or what else ?

Note that executable on flash at the moment is simple, i dubt it could block swd except for un uncorrect pin configuration..

If you need other info to narrow the problem just ask..

Thanks in advance Matteo.

#stm32f2-swd

[Tesla DeLorean]

Posted on January 17, 2013 at 01:22

Well you shouldn't need to be configuring the pins at all. If it works with BOOT0 high, then your code is doing something untoward to interfere with the pins, of the ability of the pod to break the processor out of it's current activity. One of the reasons to have NRST connected is to make the process of breaking consistent.

Things like WFI loops, DMA, and GPIO/JTAG reconfiguration are amongst the things which will cause problems. The system loader provides safe harbour for these things.

[debbiojump]

Posted on January 18, 2013 at 11:31

Well, i noticed NRST pin is MANDATORY in SWD configuration at least for STM32F2 family..otherwise whatever pin configuration you plan your chip starts with no synchro with debugger , is it correct ?

For 'synchro' i mean a match with default jtag input state for jtag pins with burst debugger sends to swdio to request SWD session.

The fact is that now it works..

Thank you for point out flaws in my original scheme..