STM32F2 GPIO glitch-free startup

[mailmail9117]

Posted on October 23, 2013 at 01:51

Are the GPIO of the STM32F2 guaranteed to be high-impedance, glitch-free during power ramp-up?

#stm32f2-gpio-start-up-glitch

[John F.]

Posted on October 23, 2013 at 09:19

It's an awkward question.

Looking at the STM32F205xx STM32F207xx Data Sheet, it says, ''At startup, all I/O pins are configured as analog inputs by firmware.'' On the other hand, until the oscillator has started (and reset has completed?), none of the clocked digital logic will operate.

The Reference Manual shows the schematic of the 5V tolerant (p135 Figure 13. Basic structure of a five-volt tolerant I/O port bit) and there are other detailed I/O schematics. In all cases, there are protection diodes from the GPIO pin to the Positive power supply and to zero volts ground. These will have the effect of clamping the pin to a diode's drop from the ground and positive supply as the supply ramps up.

There's insufficient detail in your question to understand what you want to achieve but my short answer would be no - the GPIO of the STM32F2 are not guaranteed to be high-impedance, glitch-free during power ramp-up.