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hvan.winkoop9
Associate II
February 4, 2012
Question

STM32F103ZG SDIO and DMA

  • February 4, 2012
  • 4 replies
  • 1000 views
Posted on February 04, 2012 at 22:35

Hi,

I managed to read an SD-Card on the MCBSTM32EXL board in SD-Mode (not SPI-Mode) by developing my own driver. But writing does not succeed. If I exchange the FIFO address by a variable then afterwards this variable contains the last buffer value to be send. Checking the SDIO->DCOUNT register shows 0x200 before and 0x000 after the write operation. So this seems okay but on my oscilloscoop I do not see any data on the D0 signal. If I disable the DMA and execute a manual write to the FIFO then data is transmitted.

With reading I discovered that SDIO->DCTRL DTDIR  must be defined prior to DBLOCKSIZE otherwise no data is read.

I use SDIO blocksize of 512 and DMA DMA2_Channel4->CNDT set to 128. I read the errata sheet as there are some issues with the SDIO but not the one I encountered.

Who can help me out,

Thanks

Henk

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    4 replies

    hvan.winkoop9
    Associate II
    February 4, 2012
    Posted on February 04, 2012 at 23:06

    Hi,

    After hours of testing I got desperate, tested all kinds of weird configuration sequences and finally posted my question on this forum. Just a few minutes later I removed my debug calls (executed parallel to the data-transmission) to the serial port using USART2 and DMA1 channels 6 and 7.

    Low and behold...my SD-mode write operation just works fine now!

    I carefully checked my USART2/DMA1 driver code but found no conflicting or wrong instructions. So somehow it seems that USART2/DMA1 has some influence on SDIO/DMA2. I will not investigate it further as it has cost me lots of time but if I find the cause (maybe in software) then I will report it here.

    Thanks for listening anyway.

    Henk

    Moritz M
    Associate II
    March 2, 2012
    Posted on March 02, 2012 at 17:22

    hi henk,

    sounds like a timing problem, during my testing i discovered, that if i put some code or breakpoints between the read or write block command and the enabling of dma2 then the program fails.

    [DEAD LINK /public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Timing, DMA SDIO Bug in Standards Peripherals Examples V3.5.0&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B]i wrote a few lines here

    moritz

    Tesla DeLorean
    Guru
    March 2, 2012
    Posted on March 02, 2012 at 17:51

    sounds like a timing problem, during my testing i discovered, that if i put some code or breakpoints between the read or write block command and the enabling of dma2 then the program fails.

     

     

    You're describing a race condition, the DMA should always be setup prior to initiating events that will cause it to be used.

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    Moritz M
    Associate II
    March 3, 2012
    Posted on March 03, 2012 at 20:47

    now, i know that. but in the sdio examples in the standard peripherals lib it is the other way round ;)

    You're describing a race condition, the DMA should always be setup prior to initiating events that will cause it to be used.