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dron_gus
dron_gus
Associate
October 8, 2009
Question

stm32f103vet6 pqfp100 + SRAM question

  • October 8, 2009
  • 5 replies
  • 908 views
Posted on October 08, 2009 at 09:05

stm32f103vet6 pqfp100 + SRAM question

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    5 replies

    tomas23
    tomas23
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 13:25

    Do you define these pins as AF?

    dron_gus
    dron_gusAuthor
    Associate
    May 17, 2011
    Posted on May 17, 2011 at 13:25

    I'm trying to work with external sram (16x), using to external address latches (hc273). I try all possible modes (all memory types and all access modes), slowest timings, but MCU did not output low part of address (A0..15) on AD0..15 bus before NADV rises.

    dron_gus
    dron_gusAuthor
    Associate
    May 17, 2011
    Posted on May 17, 2011 at 13:25

    Yes. GPIO_Mode_AF_PP. 3 chips of NAND (x8) wich connected to the same bus works. CSx are driven thrue HC138 (A20, A21, CS) so NAND is at 0x7000.0000, 0x7020.0000, 0x7040.0000 and sram at 0x6060.0000. Bank1 and Bank2 share the same CS, i don't think it's a problem. The only problem that there is no A0..15 on muxed bus when NADV rises. Data ouput ok. NWE, NOE, NBL0, NBL1 seems to be ok too.

    dron_gus
    dron_gusAuthor
    Associate
    May 17, 2011
    Posted on May 17, 2011 at 13:25

    Burst mode was disabled.

    As i see to make STM32 output A[0.15] i need to select NOR or PSRAM mode and disable extended mode (it was enabled :( i was planing to use diferent timing for write and read).

    Now it outputs address and latch it ok. But if i feel memory with 0xFFFF, when i see memoru thrue the debuger i see:

    0001 0002 0003 FFFF 0005 0006 0007 FFFF and so on

    The same if i write 0x0:

    0001 0002 0003 0000 0005 0006 0007 0000 and so on

    As i think memory latch data after stm32 alredy set low part of address of next transaction. But i can't undestand why it happens so. I see how NWE rises while data is stil on DA[0..15].

    I think that reading works fine, becouse memory is readed with garbage (not 0001 0002 ...) befire i write anything to it.

    If i go step-by-step thrue the code memory erite is ok. But if i make ''go'', i get 0001 0002 0003 VALID 0004 ... again.

    [ This message was edited by: dron_gus on 08-10-2009 12:36 ]

    tomas23
    tomas23
    Visitor II
    May 17, 2011
    Posted on May 17, 2011 at 13:25

    First, don't assume the troubles never occur and try to use only one CSx\, try to isolate the problem. Do you see activity on the AD0-15 lines in different modes, not only related to your RAM?

    Next, hopefuly you didn't activate burst mode, that expects the address rising internally on RD\ edge.

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