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tilmann
Associate II
December 14, 2016
Question

STM32F103 - PB3 just doesn't work as GPIO

  • December 14, 2016
  • 12 replies
  • 12056 views
Posted on December 14, 2016 at 10:27

Hello,

did anyone ever manage to get PB3 working as an I/O port on an STM32F103?

I am having a hard time with the F103VB where I need PB3 as input - no matter what I try, PB3 simply is returning a 0 value.

AFIO->MAPR is set to SWD debug only, JTAG off (and AFIO clock is on, of course).

I also explicitly set DBGMCU_CR to turn TRACE off, although that should be default after reset.

The other two related port pins (PB4 and PA15) work perfectly fine as GPIO. Only PB3 simply appears dead.

The errata sheet also doesn't mention any problems with PB3 as GPIO.

Did I find a new bug?

Any help is greatly appreciated.

Thanks, Tilmann

    This topic has been closed for replies.

    12 replies

    Mon2
    Senior III
    December 14, 2016
    Posted on December 14, 2016 at 12:41

    Just found the following using Google. You will have to locate the respective call to disable the use of the JTAG pins which are common to PB3.

    http://www.stm32duino.com/viewtopic.php?t=1458&p=18818

     

    http://www.stm32duino.com/viewtopic.php?t=1130#p13918

     
    ST Technical Moderator
    December 14, 2016
    Posted on December 14, 2016 at 14:36

    Hello

    Reh.Tilmann

    ,

    You can refer to the reference manual RM0008 for more clarification, in 'General-purpose and alternate-function I/Os (GPIOs and AFIOs)' and 'JTAG/SWD alternate function remapping' section.

    Hope this helps you.

    Best Regards

    -Imen-

    In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. Thanks
    tilmann
    tilmannAuthor
    Associate II
    December 14, 2016
    Posted on December 14, 2016 at 17:39

    Thanks for your answers - however in my post I already mentioned that I have disabled JTAG and still PB3 does not work as GPIO. Of course I can also use Google and read the RM, and you can be sure I extensively did. Otherwise, I wouldn't have asked here...

    The other two ports that can be used by JTAG (PB4 and PA15) are working correctly as GPIO, so disabling JTAG basically works - however not PB3.

    Best regards,

    Tilmann

    waclawek.jan
    Super User
    December 14, 2016
    Posted on December 14, 2016 at 17:54

    Post the read-out content of relevant registers.

    JW

    Lawliet KG
    Visitor II
    December 14, 2016
    Posted on December 14, 2016 at 18:09

    Hi,

    In 'STM32F1 getting started hardware development' application note , you can see that PB3 is used by the SW debug port. PB5 and PA15 are only used by JTAG, this is why you can use them as GPIO pins by disabling the JTAG and keeping the SWD enabled.

    If you want to use PB3 pin, you must also disable the SWD.

    Lawliet.

    Tesla DeLorean
    Guru
    December 14, 2016
    Posted on December 14, 2016 at 18:18

    Lawliet KG wrote:

    If you want to use PB3 pin, you must also disable the SWD.

    That really isn't what the RM0008 manual says...

    0690X00000603ElQAI.jpg
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    _dalbert
    Associate II
    February 8, 2019

    Agreeing with Clive: this isn't true, you do not need to disable SWD. You want option 2 (SWJ_CFG=010 -> JTAG-DP Disabled and SW-DP Enabled) in the above table. I use PB3 and PB4 as GPIO with SWD enabled.

    Lawliet KG
    Visitor II
    December 14, 2016
    Posted on December 14, 2016 at 19:42

    Hi reh.tilmann,

    If you want to use the PB3 as a GPIO pin, you should not use the asynchronous trace over the SW debug.

    Lawliet.

    tilmann
    tilmannAuthor
    Associate II
    December 14, 2016
    Posted on December 14, 2016 at 23:26

    Hello Lawliet,

    I really appreciate that you want to help - but did you read the previous posts, starting with the very first one?

    I do not use async trace, and mentioned that often.

    Tilmann

    Tesla DeLorean
    Guru
    December 15, 2016
    Posted on December 15, 2016 at 00:25

    What debugger hardware and software are you using?

    Been years since I was actively building with F1 parts but don't recall PB3 being unusable.

    Tips, Buy me a coffee, or three.. PayPal Venmo (See Profile) Up vote any posts that you find helpful, it shows what's working..
    tilmann
    tilmannAuthor
    Associate II
    December 15, 2016
    Posted on December 15, 2016 at 11:15

    Hello everybody,

    problem solved - indeed it was a small typo in the MAPR assignment, so in fact JTAG was not disabled in the application code. The bootloader didn't have that typo, so JTAG was disabled there, but during initialization of the application all peripherals are reset - and it appears that this partially resets the JTAG port assigment... (Remember that PB4 and PA15 still worked as GPIO, that's why I didn't notice that typo for such a long time (and obviously I overlooked it very many times when checking the code)).

    Sorry, my fault. Now PB3 works as expected.

    Tilmann

    waclawek.jan
    Super User
    December 15, 2016
    Posted on December 15, 2016 at 11:22

    >problem solved - it was a small typo in the MAPR assignment

    This is why I asked you to post the read-back content of relevant registers.

    JW

    tilmann
    tilmannAuthor
    Associate II
    December 15, 2016
    Posted on December 15, 2016 at 11:32

    Remember that particularly these bits of MAPR are write-only, unfortunately.

    Tilmann

    Micha Valach
    Associate III
    March 12, 2017
    Posted on March 12, 2017 at 09:35

    Hello Tilmann,

    I'm having the same problem.

    Not sure, how did you solve the GPIO PB.3 problem?

    You had mention '

    small typo in the MAPR assignment

    ' , in my case I call once to: AFIO->MAPR = 0x02000000;  and still it doesn't work. Please be more specific what is the fixed value you wrote to MAPR?

    Thanks In Advance,

    Micha 

    waclawek.jan
    Super User
    March 12, 2017
    Posted on March 12, 2017 at 12:43

    Don't you use the 'asynchronous trace', enabled possibly by your toolchain (maybe by enabling some form of 'semihosting' )?

    JW

    markus-muc
    Associate II
    June 1, 2017
    Posted on June 01, 2017 at 17:59

    I am having the same problem. I am using the STM32 peripherals library for configuration, so my init code looks like this:

    // Disable JTAG, keep SWD => Enable PB3, PB4 for GPIO output

    GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);

    // Activate port B periphery

    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);

    // PB3 (output, high active): PP

    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;

    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;

    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;

    GPIO_Init(GPIOB, &GPIO_InitStructure);

    // PB4 (output, high active): PP

    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;

    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;

    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;

    GPIO_Init(GPIOB, &GPIO_InitStructure);

    As a result, PB4 works as expected, but PB3 doesn´t. 

    I am using Atollic TrueStudio, so it may be that 'asynchronous trace' is enabled. However, I cannot find any option to configure it - and Google is _not_ my friend (i.e. couldn´t find how to turn 'asynchronous trace' off in Atollic).

    Anybody any idea?

    Chris1
    Associate II
    June 1, 2017
    Posted on June 01, 2017 at 18:16

    Perhaps mode should be GPIO_Mode_Out_PP.

    markus-muc
    Associate II
    June 1, 2017
    Posted on June 01, 2017 at 18:36

    Tried this as well - it doesn´t change anything. PB4 works but PB3 doesn´t - whether mode is 

    GPIO_Mode_AF_PP or 

    GPIO_Mode_Out_PP seems to be don´t care.

    markus-muc
    Associate II
    June 1, 2017
    Posted on June 01, 2017 at 20:22

    I just realized I was wrong with PB4, it is stuck at high and also does not switch. AFIO clock is enabled, I will check later for the 

    DBGMCU_CR ...

    _dalbert
    Associate II
    February 8, 2019

    You can indeed use PB3 and PB4 as GPIO pins provided you do not need their default TRACESWO and NJTRST functions (which you don't for most ST-Link V2 debugging). The following code is tested and works.

     // Release PB3/TRACESWO and PB4/NJTRST from control of the
     // Debug port so they can be used as GPIO pins
     DBGMCU->CR &= ~DBGMCU_CR_TRACE_IOEN;
     RCC->APB2ENR |= RCC_APB2ENR_AFIOEN;
     AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_JTAGDISABLE;

    _dalbert
    Associate II
    February 8, 2019
    Sorry, I was agreeing with what you said and providing additional detail; in re-reading, I realize that wasn't clear, I've clarified my comment to state that.  Thanks Clive!