STM32F103 - IAP (In Application Programming) - Clock and Speed?

[Joe.H]

Currently have a STM32F103 running HSE + pll with a SysClk of 72 mhz.

I want to use one of the upper flash memory blocks for storing application information - which means I need to erase and program the flash memory from my application (I do this all the time when using an STM32F4xx micro).

I am referencing App Note PM0074 - Programming manual - STM32F10xxx Flash memory.

microcontrollers

Page 10 has the statement "For write and erase operations on the Flash memory (write/erase), the internal RC oscillator (HSI) must be ON."

There are no other statement relating to clock or speed anywhere.

Q1. Can I continue to use HSE+PLL and operate at 72 mhz and just turn on the HSI but not directly use it?

Q2. Do I have to switch the clock FROM HSE+PLL to HSI before I can erase/program flash memory?

Q3. If I have to switch to HSI - do I need to operate at the internal 8 mhz frequency?

Thanks in advance for any insight - the documentation (this app note and others) are NOT very clear on the clocking requirements.

[Tesla DeLorean]

I don't recall it being a requirement, but it's been a decade since I used F1s in a project.

​

H​ow hard is it to enable the HSI by itself and make a determination?

[Tesla DeLorean]

If we took the statement literally, as an IC design guy, it would suggest it is used as a self timing method of known frequency / duration.​ And tapped directly.

​

T​he processor speed should be immaterial as it stalls it with wait states if you try to interact with FLASH. The ROM loader clocks the part at 24 MHz via HSI+PLL, as I recall.

[Joe.H]

I was hoping to get some insight before I started experimenting.

Not difficult to set HSI ON and proceed - but was hoping for feedback before blinding trying.

Thanks for your reply.

[Tesla DeLorean]

I suspect if it is a requirement, its going to be a binary one, and not circuitous.

@Alec BATH​ @Peter BENSCH​ do you recall this being an actual requirement on the F1's

[Peter BENSCH]

Yes, HSI must indeed be switched on during Write/Erase of the flash, it is sufficient to activate only HSI. As you can see in RM0008, HSI also supplies the internal signal FLITFCLK, which leads to the Flash programming interface (figure 8, page 93, or fig 11, pg 126).

So the answers are:

• A1: Yes
• A2: No
• A3: No

Does it answer your questions?

Regards

/Peter

[Joe.H]

The Clock tree diagram shows the HSI directly feeding the Flash Controller - as noted above - for a known and constant clock source. I will attempt to erase/flash at 72 mhz.