STM32F072: where is "APB1 prescaler" defined in the Reference Manual?

[DSudo.2]

The STM32F072 Clock tree figure in reference manual shows APB1 prescaler, but where is that defined in the reference manual?

 

When I search for APB1 in the reference manual, in the context of a register field, it does not show up (other than in the clock tree figure). This controls the frequency that goes to the timer peripherals. Additionally, this figure shows "x1" or "x2" by this APB1 label, which is different than all the other values associated with division (they're shown as "/n", where n is the divide by value). Does the "xn" mean you multiply by 1 or 2, or divide by 1 or 2? Does ABP1 prescaler mean bit 0 or bit 1 of the APB prescaler register field? This part of the reference manual (figure 10 in RM0091 Rev 10) doesn't make sense to me. Thanks for any help in clearing this up.

[waclawek.jan]

The 'F0xx family has only one APB bus, contrary to higher-end families which usually have two. Thus, APB1 refers to the same bus as APB. (There are RCC_APB1ENR/RCC_APB2ENR and RCC_APB1RSTR/RCC_APB2RSTR registers, but the 1 and 2 there is just an index to distinguish two registers, as there's too many peripherals to enable/reset on the highest-end 'F091 APB bus to fit them into a single register).

> Additionally, this figure shows "x1" or "x2" by this APB1 label, which is different than all the other values associated with division (they're shown as "/n", where n is the divide by value).

That piece of the diagram refers to the timers' clock, which with equal to APB clock when APB divider == 1, and is twice the APB clock when APB divider is >= 2 (it's not multiplier as such, it's simply that the timers' clock is run from AHB clock through a divider which is set to one bit less than the APB divider, unless APB divider = 1).

JW

[DSudo.2]

Thanks so much for the quick answers... I really appreciate it.