STM32F cyclecounter, cctimer1, cctimer2 address mapping

[George.P]

Posted on May 18, 2017 at 11:40

Οn which documentation file can one find the address mapping for the ARM registers on topic?

[Tesla DeLorean]

Posted on May 18, 2017 at 16:24

ARM has Technical Reference Manuals for their cores.

ST has a Reference Manuals for the peripheral registers they add to their designs.

[George.P]

Posted on May 19, 2017 at 07:12

Hi Clive,

Since I'm talking about memory address mapping, only ST can give the location those registers are mapped, which is not being discussed in their reference manuals. 

[AvaTar]

Posted on May 19, 2017 at 08:29

DWT belongs to the core space, the peripheral address is thus defined by ARM. Like the SysTick counter, it is the same on every device - if the vendor chooses to implement it (DWT is optional).

For some reasons whatsoever ST forgoes to document the core space peripherals. Others do/did not.

[George.P]

Posted on May 19, 2017 at 09:48

Hi AvaTar,

Thanks for the clarification.

I wasn't aware that memory mapping for core peripherals is defined by ARM. I was under the impression that ST could reallocate the memory to better suit their design.

In any case, I wasn't able to read 

DWT_CYCCNT @ 

0xE0001004, so I'll have to research it a bit further.

[AvaTar]

Posted on May 19, 2017 at 10:38

I didn't mess wit DWT myself yet, just left it to the debugger.

But I'm pretty sure you need to enable it the same way as other peripherals. Perhaps you missed that ?

[waclawek.jan]

Posted on May 19, 2017 at 10:43

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