STM32F ADC driven by TIM4_CC4 PWM output

[dcsudolcan]

Posted on June 12, 2008 at 13:18

STM32F ADC driven by TIM4_CC4 PWM output

[dcsudolcan]

Posted on May 17, 2011 at 12:36

I'm new to the STM32F parts, so maybe I'm trying to do something that's not possible. The datasheet leads me to believe that it should be possible to configure timer 4's capture/compare 4 in PWM mode, route it to an I/O pin (for oscilloscope confirmation of proper operation), and then use that signal to start A/D conversions at a rate fixed by the frequency of the PWM signal on timer 4's capture compare output.

I'm running my code on KEIL's MCBSTM32F eval board, and I've confirmed that my PWM signal on PB9 is working as expected. I can adjust the duty cycle or frequency, and the signal behaves as expected. This leads me to believe I've got timer 4's capture/compare 4 configured properly on PB9.

I've hacked my code to make the A/D do conversions of the wiper on the 10K pot on the eval board, based on software triggers, then dumped the results out the RS232 port. I can see the reported voltage on my terminal emulator rise and fall as I twist the pot back and forth. This makes me think my GPIO configuration for my analog input is configured properly.

My problem is that my A/D ISR (in the non-hacked attached version), once triggered, seems to trigger again immediately as soon as it's exited, as long as I set the ADON bit in the A/D's CR2 register; rather than at the next timer 4 capture/compare 4 event as expected. If I don't set the ADON bit in the A/D ISR, the ISR only get's serviced once, so it seems like I need to set that bit. But, it seems like as soon as I set that bit, the A/D ISR get's enabled to be serviced right away, rather than at the next timer 4 capture/compare 4 event.

I've attached the relevant code (minus the #define's in the header files) to see if someone can tell me how to change it to make the A/D ISR get serviced once for each timer 4 capture/compare 4 event.

Thanks for any help,

Dave.

[jj_it]

Posted on May 17, 2011 at 12:37

Dave,

Thanks much for ''closing the loop'' in your clear, complete posts.

Others can now benefit from your learning/sharing - appreciated...

[dcsudolcan]

Posted on May 17, 2011 at 12:37

Never mind... I finally figured it out!

I wasn't setting the EXTTRIG bit in ADC_CR2. Once I did that I didn't need to set the ADON bit in my A/D ISR, and everything else worked as expected.

Whew... problem solved!

[dcsudolcan]

Posted on May 17, 2011 at 12:37

P.S. Sorry for any 'comment' confusion. After reviewing the post, I saw that some of the timer comments still refer to a timer other than timer 4. That's an inadvertent cut/paste error in my source. I really am using timer 4 in output capture PWM mode on channel 4, not some other timer.

[dcsudolcan]

Posted on May 17, 2011 at 12:37

You're welcome. After figuring out how something works, I always like to go back and clean up the code. Here's the much simplified, shorter, working solution. I did have to flip a few bits other than the single one I mentioned to get things working just the way I wanted them to.

Dave.