STM32Cube_FW_F4_V1.19.0 - CAN Rx pending message flag doesn't get cleared

[Bruno Conceição]

Posted on January 26, 2018 at 12:03

Hi All, I'm using STM32Cube_FW_F4_V1.19.0 in a STM32F24ZI for a company project where it is intended to deploy a CAN network. 

I believe I've come across an HAL bug. It seems to me that RX pending message flag from FIFO0 and FIFO1 are not being cleared by th FW. 

Is it supposed to be so, or is it really a bug?

Thanks in advance

[Tesla DeLorean]

Posted on January 26, 2018 at 14:03

Or, it could be you're not clearing all the messages out of the FIFO, or it is fill rapidly off the wire quicker than you are processing them. For example CAN is much quicker than a USART outputting telemetry.

[Bruno Conceição]

Posted on January 26, 2018 at 15:55

Hi Clive,

thanks for the quick response. I think that is not the issue as I have the transmitter unit in debug mode with a breakpoint at:

/* Request transmission */

SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ);

and in the receiver unit (also in debug) I get 4 or 5 interrupts.

I've looking at stm32f4xx_hal_can.c and realized that in HAL_CAN_IRQHandler the management for every interrupt related to CAN includes a __HAL_CAN_CLEAR_FLAG macro, except:

 /* Receive FIFO 0 message pending interrupt management *********************/

if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != RESET)

{

/* Check if message is still pending */

if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != RESET)

{

/* Receive FIFO 0 mesage pending Callback */

/* Call weak (surcharged) callback */

HAL_CAN_RxFifo0MsgPendingCallback(hcan);

}

}

and 

/* Receive FIFO 1 message pending interrupt management *********************/

if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != RESET)

{

/* Check if message is still pending */

if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != RESET)

{

/* Receive FIFO 1 mesage pending Callback */

/* Call weak (surcharged) callback */

HAL_CAN_RxFifo1MsgPendingCallback(hcan);

}

}

Also, if I add:

__HAL_CAN_DISABLE_IT(hcan,CAN_IT_RX_FIFO1_MSG_PENDING);

inside the above 'if' and re-enable the IT on RX Callback things seem to work.

I'm relatively new to STM32 and maybe I'm  using this peripheral the wrong way

Thanks again

[Bruno Conceição]

Posted on January 26, 2018 at 17:51

Hi everybody,

sniffering the bus with a scope realized that there was a small deviation on CAN frame total length (time)

I was getting 40us less on an expected total of 888us.

I was running the uC on HSI, switched to HSE and the problem is gone. No need to Disable Interrupt or Clear any flag.

Adjusting  ReSynchronization Jump Width also improves system's response.

[T J]

Posted on January 28, 2018 at 04:05

my '091 CanBus uses the HSI, so this may be an issue for me.

my '767 CanBus terminal uses the HSE clock

but I don't see any comms problems.

On my test bench, I only have three different processors connected, 2x '091 and a '767  everything works fine for now..

I will look out for this issue.