STM32429I-EVAL1: SDIO at 50MHz?

[Don Starr]

Posted on May 20, 2017 at 23:09

I have an STM32429I-EVAL1 board. I have these working happily:

* microSD at 25MHz with 4-bit interface, using DMA

* USB OTG HS as an MSC device

* FatFs talking to SDIO with 8-10 MB/s throughput (write/read)

* USB (from Windows PC) talking to SDIO with 6-8 MB/s throughput (write/read)

I started with STM32CubeMX (4.21.0, with all updates), selecting my EVAL1 board and initializing all peripherals to their defaults for the board, then adding DMA / IRQ support for SDIO and fixing the interrupt priorities so that HAL_Delay() doesn't lock up.

The above data rates are pretty good, but I think they can be better - especially if I can [roughly] halve the time it takes to stream bytes to and from the SD card.

Do the HAL and/or BSP support for SDIO automagically increase the clock rate to 50MHz if the SD card can support that rate? If not, is there an 'easy' place to hook into?

[Tesla DeLorean]

Posted on May 21, 2017 at 02:58

Not aware the code will do it for you. The bypass mode that will feed 48 MHz, rather than 24 MHz, but has an errata, it might work with certain cards. Unfortunately as you're using USB you can't push the SDIO clock higher, but if you weren't the clock is capable of going to 75 MHz, with a clock to the card of 37.5 MHz.

[Don Starr]

Posted on May 21, 2017 at 19:44

Thanks. Yeah, I forgot about the 48MHz limit imposed by USB. My above '25MHz' was based on looking at one clock cycle in my cheap logic analyzer (10ns sample interval) - it looked like 40ns, or 25MHz. Looking at the time across a few hundred clock cycles, it's really 24MHz.

I've determined that the existing code (stm32f4xx_hal_sd.c) won't do it for me. After modifying the SD_InitCard() function in that module, I see the clock running at 48MHz, but there are some large gaps between bytes - the effective rate is only about 32MHz.

I haven't been able to find an errata regarding this. Can you point me to it?

[Tesla DeLorean]

Posted on May 21, 2017 at 21:01

Looks to have been pulled from the 42x doc

http://www.st.com/content/ccc/resource/technical/document/errata_sheet/38/e6/37/64/08/38/45/67/DM00068628.pdf/files/DM00068628.pdf/jcr:content/translations/en.DM00068628.pdf

 

Pg 43 here

http://www.st.com/content/ccc/resource/technical/document/errata_sheet/0a/98/58/84/86/b6/47/a2/DM00037591.pdf/files/DM00037591.pdf/jcr:content/translations/en.DM00037591.pdf

 

Don't have an F429 design w/SDIO to evaluate, might look at F469 or F412 boards

Basically the BYPASS bit sidesteps the DIV2..X chain and gets you a DIV1