STM3210E-EVAL and SPI3

[infoinfo965]

Posted on August 17, 2010 at 14:57

STM3210E-EVAL and SPI3

[swhite2]

Posted on May 17, 2011 at 14:02

I'm using SPI3 on an STM32F103VET6 (custom hardware) and it does work.

As you already know you do have to disable the JTAG functionality on the port pins (and disconnect any JTAG device).

On my design I don't have JTAG connections at all and use the SWD and TRACE interfaces for debugging. I also use

    GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);

to enable normal GPIO functionality on PA15 (SS), PB3 (SCLK) and PB4 (MISO).

I haven't reviewed your code line-by-line but I'd start out without interrupts and do something simple like sending/receiving one byte and use a oscilloscope etc to verify everything.

[aqueisser]

Posted on May 17, 2011 at 14:02

Hi Rick,

Probably long resolved by now but I noticed that you're mixing two options in your call to remap the I/O pins:

GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable | GPIO_Remap_SWJ_NoJTRST, ENABLE);

I was just single-stepping through my code to disable JTAG in order to use SPI3 and when I pass in both bits as you do above I get a bit combination that, according to the reference manual, has no effect.

I think the call shown by StuartMW in the earlier reply is the correct one if you want to use SWJ without JTAG.

Andrew

[kurtn]

Posted on May 17, 2011 at 14:02

Can somebody confirm that the JTAG disabling which StuartMW mentioned here really work, please? 

If I use GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE); JTAG will be disable and SWD enable?

 

There is the AFIO_MAPR register in Ref.Manual on page 170. SWJ_CFG configuration bits are on 24-26 bit position. But in the gpio.h, there is a define - #define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */. It means 0000 0000 0011 0000 0000 0010 0000 0000. It doesn´t match with 24-26 bit position in Ref. Manual. It is a little bit strange, isn´t it? Can somebody explain it, please?

[kurtn]

Posted on May 17, 2011 at 14:02

Oh, my fault. Thanks

[Tesla DeLorean]

Posted on May 17, 2011 at 14:02

It doesn´t match with 24-26 bit position in Ref. Manual. It is a little bit strange, isn´t it? Can somebody explain it, please?

 

The #define contains information encoded for the Remap routine, not a bit vector for the register directly. The low order word is shifted left 16 bits.

0000 0010 0000 0000 0000 0000 0000 0000

1111 0000 1111 1111 1111 1111 1111 1111 0xF0FFFFFF Mask

Review the library source.