STM32 PDR, PA0 (WAKE), BypassReg connections

[mahendrai]

Posted on January 05, 2015 at 16:41

We are not using sleep/wake functionality. Can PA0 be left open? If it is to be connected to ground or VDD can it be connected directly or need to connect thru resistor?

Similarly, PDR and Bypass regulator. Can PDR be connected to VDD and Bypass_REG to GND directly or need to be connected thru a resistor?

Thanks

MR

#!stm32f4-disco #stm32-stm32f4

[kevin2399]

Posted on May 17, 2016 at 19:07

I have the same question, and an associated one.  I am developing a severely size-constrained application with the STM32F7 WLCSP package, which has those pins. I would prefer to not take up space with resistors if they are not needed.  I also am wondering if, due to the small size of the IC, I can get away with combining a few of the VDD pins to a single local bypass, the goal being to use as few bypass capacitors as possible. Given that the entire chip is < 5x6 mm, and I am using ground and power planes, will fewer bypass caps be acceptable, especially if placed on the underside of the board below the IC? 

[Walid FTITI_O]

Posted on May 18, 2016 at 14:07

Hi ippagunta.mahendraku and wired, 

You will find the needed information inside that ''Hardware getting started'' application notes for each STM32 device.

For STM32F4xx device, refer to

http://www.st.com/content/ccc/resource/technical/document/application_note/76/f9/c8/10/8a/33/4b/f0/DM00115714.pdf/files/DM00115714.pdf/jcr:content/translations/en.DM00115714.pdf

.

For STM32F7xx device, refer to

http://www.st.com/content/ccc/resource/technical/document/application_note/b0/5c/ba/b2/cb/10/41/dd/DM00164549.pdf/files/DM00164549.pdf/jcr:content/translations/en.DM00164549.pdf

.

-Hannibal-