> must have 6 number of ADCs
6 independent ADC's or just the capability to monitor 6 ADC channels? I'm assuming the latter, which most (all?) chips can do. Don't think any have 6 ADCs. The G4 family has 5.
> capable of generating PWM signals with deadtime
Most families have 1-2 advanced timers.
https://www.st.com/resource/en/application_note/dm00042534-stm32-crossseries-timer-overview-stmicroelectronics.pdf
Those criteria are not very limiting. STM32L4 for low-power, STM32H7 for high performance.
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