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CMcC.1
Associate III
June 4, 2020
Question

STM32 Infinite loop when Interrupts are enabled ( REPOST since my previous one doesn't load it seems)

  • June 4, 2020
  • 0 replies
  • 878 views

Hi everyone.

So my previous post just did not load for some reason.

The problem is that for some reason I get this issue when I debug once I enable the interrupts.

I am simply trying to respond on the TIM5 interrupt but I get thrown to a part of the file startup_stmf32f401retx.s to this line of code:

/**
 * @brief This is the code that gets called when the processor receives an
 * unexpected interrupt. This simply enters an infinite loop, preserving
 * the system state for examination by a debugger.
 *
 * @param None
 * @retval : None
*/
 .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
 b Infinite_Loop 

Now it seems like it's suppose to help me analyse whats going on inside an interrupt but I didn't have any breakpoints set in the project yet?

 

This is the Stack Trace.

Thread #1 [main] 1 [core: 0] (Suspended : Signal : SIGTRAP:Trace/breakpoint trap)	
	UsageFault_Handler() at startup_stm32f401retx.s:101 0x8000630	
	() at 0xfffffff1	
	0x0	
	() at 0xfffffff9	
	stepper_init() at stepperpwm.c:18 0x80001ea	
	main() at main.c:38 0x8000530	
	Reset_Handler() at startup_stm32f401retx.s:83 0x8000616	

Finally here is my code... I like to try it baremetal before I start using MCU specific headers for the most part.

 

main () {
	housekeeping_init();
 
 while(){
	housekeeping();
 }
}
 
 
void housekeeping_init(){
	__disable_irq();
 
	RCC->AHB1ENR |= 1;//(1 << 0);
 
	//TIM5
	RCC->APB1ENR |= (1 << 3);
 
	TIM5->PSC = 1000-1;
	TIM5->ARR = 10-1;
 
	TIM5->DIER |= 1;
 
	NVIC_SetPriority(TIM5_IRQn,2);
	NVIC_EnableIRQ(TIM5_IRQn);
	GPIOA->MODER |= 1;
	__enable_irq();
	TIM5->CR1 |= 1;
}
 
void TIM5_IRQHandler(){
	//TIM5->SR &= ~(1);
	TIM5->SR &= ~0x01;
	//TIM5->SR = 0;
	GPIOA->ODR ^= 1;
	***++;
}
 
void housekeeping(){
	if (*** == 300) {
		GPIOA->ODR ^= 1;
	}
}

 

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