Posted on July 10, 2014 at 16:32The original post was too long to process during our migration. Please click on the attachment to read the original post.
I don't use the 'F0 but reading RM0091 I'd say this is the expected behaviour of DMA in the 'F0, when MSIZE is different from PSIZE, regardless of PINC/MINC. In other words, this is the simplest possible DMA model - no FIFO and the transfers are 1:1 - padding the missing bits with 0 (or throwing away unneeded bits, depending on the ratio of sizes and transfer direction).
However, are you sure you can't access the packet memory as 8-bit? IMO the RM is not very clear in this respect. I personally would try MSIZE=PSIZE=8-bit first. If that fails, as plan B, you might perhaps try to transfer data from ADC to the ''regular'' RAM as 8-bit, and in a second step, using a timer-triggered memory-to-packet-memory 16-bit transfer... JW
> Why couldn't you use 16-bit and halve the transfer size? Aren't the bytes just packed in contiguous memory cells?
Well, the RM says something about the packet memory being 16-bit wide (RM0091 rev6, Table 113 on p.844, also on p.848 ''structured as 512 half-wordsby 16 bits''). However, further reading revealed the comment on p.872, ''The packet memory should be accessed only by byte (8-bit) or half-word (16-bit) accesses.'' Ergo, IMO, MSIZE=PSIZE=8-bit should work. JW
