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Paul Mellor
Associate II
June 26, 2017
Question

ST-link v2 at 1.8V?

  • June 26, 2017
  • 6 replies
  • 10288 views
Posted on June 26, 2017 at 17:37

I am using the ST-Link v2 with a target STM32 board running at 1.8V. I connect the 'target Vcc' to my boards Vcc ok, but the SWDIO and SWDCLK outputs from the ST-link are at 3.3V. Yet it looks like it is supposed to work down to 1.65V. How can I use it with my 1.8V board?

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    6 replies

    Tesla DeLorean
    Guru
    June 26, 2017
    Posted on June 26, 2017 at 18:08

    The stand-alone ST-LINK provides a pin for the VTref (Target Voltage), this is used to power the IO buffers.

    Is this an authentic ST-LINK, or a clone?

    Perhaps you can diagram your circuit and connectivity.

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    Paul Mellor
    Associate II
    June 26, 2017
    Posted on June 26, 2017 at 18:50

    0690X00000607POQAY.png

    Apologies for crudity of diagram!

    Yes it is a genuine brand new ST-link v2.

    The target board has its own LiPo and regulator providing a Vcc of 1.8v. This is connected to pin 1 and 2 on the ST-Link as per the pinout diagram for SWD in UM1075.

    If I just connect GND and Vcc then Vcc remains at 1.8v, but testing SWDIO and SWCLK they are both at 3.3v.

    I expected the target voltage to vbe used to drive the other outputs as you say, but they don't seem to do that...?

    Tesla DeLorean
    Guru
    June 26, 2017
    Posted on June 26, 2017 at 19:29

    The clones don't have the level/buffer chip (245)

    https://wiki.cuvoodoo.info/doku.php?id=jtag

     

    This is what an official one looks like inside, U2 is the buffer chip

    0690X00000603oiQAA.jpg
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    S T
    Visitor II
    June 26, 2017
    Posted on June 26, 2017 at 19:55

    Hi Clive, thanks for providing some insight.

    For my adapter, purchased from Digikey, it looks like an authentic device per your U2 level shifter reference; same TI product package marking. Trace layout and the ground pours also look spot on, doesn't seem like a clone.

    Any other thoughts?

    0690X00000603uLQAQ.jpg
    S T
    Visitor II
    June 26, 2017
    Posted on June 26, 2017 at 19:28

    +1

    I see this exact same issue on my ST Link V2; paired with a STM32L4x6, using both STM32 ST-Link Utility and STM Workbench. Pin 1 Target VCC is steady 1.8V throughout, but the IO voltage on SW CLK and SWO are 3.3V. The voltage coming back from MCU is 1.8V, as expected.

    I can talk to the target just fine, but concerned about Vih and incorrect sampling; and of course over driving pin IO

    0690X00000607VPQAY.png
    misagh
    Associate II
    June 26, 2017
    Posted on June 26, 2017 at 20:05

    AS the SW pins are 5 V tolerant, it seems that the 3.3 V input to these pins is not dangerous. Also the ST-LINK main chip is STM32F103 with 3.3 V VCC, so the minimum VIH is 1.8 V. Therefore, the output of your chip will be correctly read by your ST-LINK. 

    S T
    Visitor II
    June 26, 2017
    Posted on June 26, 2017 at 20:30

    Thanks for your input, let's go two paths with this topic:

    1) Why isn't STLink using 1.8V IO when target voltage is 1.8V?

    I don't think this is answered. My understanding is 1.8V is a supported mode of operation (i.e. all IO voltages from STlink are 1.8V).

    2) ST Link operating at 3.3V should be fine.

    Looking at controller datasheet (STM32F103), Vih is the following.

    0690X00000607MsQAI.png

    If VDD is 3.3V + 5% (example accuracy tolerance of supply), then standard IO pin is 1.900V Vih. If SWO/CLK go to 5V tolerant pins on STLink, then 1.615V Vih. I didn't see an STLink schematic, so can't check the mapping. So depending on which pins this maps to, this might be more of a problem when talking with 1.8V target. The concern here is corner cases, especially with disparity caused by unexpected connector impedance or ground levels.

    Paul Mellor
    Associate II
    June 26, 2017
    Posted on June 26, 2017 at 20:54

    0690X00000603lpQAA.jpg

    Mine is from Farnell and has U2 in place and does not look like a clone either.

    A simple stand-alone test I did was to put 1.8v between Vcc (pins 1&2) and GND (pins 3,4,5,6,8,10,12,14,16,18,20) and then have a look at SWDIO (pin 7) and SWCLK (pin 9). On my system both are at 3.3V. We really need a schematic or some good inside knowledge of what's going on.

    Zt Liu
    Senior III
    June 27, 2017
    Posted on June 27, 2017 at 09:10

    Below is a cloned version from China (hey, it just somehow appeared on my desk!)

    TI's voltage translator is sitting there.

    0690X00000603uVQAQ.jpg

    However....(using above designators )

    I made some short test and discover that

    SWCLK and SWDIO pins(pin7 & pin9 respectively) are directly connected to 

    the STM32F103's pin 26 27 throuth 100 ohm resistors(RS1) and with a protection diodes (U2). 

    But SWDIO also connects to Voltage translator's B3 port, and A3 port connects to STM32F103's Pin25(PB12)

    As for the TI's voltage translator, OE and DIR pins are both grounded!

    Checked the datasheet, it says.

    0690X00000607QpQAI.png

    (A should be the 3.3V side and B for target Vcc)

    I think, as least for this cloned version,  

    the level shifter just works for SWDIO from Vcc target side to Vcc st-link side.

    Paul Mellor
    Associate II
    June 27, 2017
    Posted on June 27, 2017 at 10:14

    Ok I tested my genuine version too. SWDIO is connected to B3 on the level shifter (SN74LVC8T245) as you say, and also OE and DIR are both grounded. So yes, the output looks like it will always be 3.3v, and the level shifter just used on input for SWDIO.