SRAM scattered architecture on the STM32H7
Hello
For the STM32H7 micro controllers what does a "SRAM with scattered architecture mean".
"The STM32H7x3 line provides from 1 to 2 Mbytes of Flash memory, 1 Mbyte of SRAM with a scattered architecture: 192 Kbytes of TCM RAM (including 64 Kbytes of ITCM RAM and 128 Kbytes of DTCM RAM for time-critical routines and data), 512 Kbytes, 288 Kbytes and 64 Kbytes of user SRAM, and 4 Kbytes of SRAM in backup domain"
I would like to design a camera board which outputs a RGB565 640x480 image. This comes to be 614.4Kbytes. I would like to store this into the SRAM using a DMA transfer. I do not want to use an external SDRAM if not needed.
So just wondering whether I could allocate a frame buffer in the SRAM for the H7 device to store the entire 640x480 image. The scattered architecture confuses me because I am not sure if I could allocate a contiguous array of size 614.4 KBytes
I would appreciate any feedback
Thanks