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Associate
July 17, 2023
Solved

SPI TXE flag set early

  • July 17, 2023
  • 5 replies
  • 2234 views

Hi,
I m testing SPI TXE flag with the following code:

void TestSPI(void)
{
GPIO_ResetBits(GPIOA, GPIO_Pin_4);

SPI_I2S_SendData(SPI3, 0);
while (!SPI_I2S_GetFlagStatus(SPI3, SPI_I2S_FLAG_TXE));

SPI_I2S_SendData(SPI3, 0);
while (!SPI_I2S_GetFlagStatus(SPI3, SPI_I2S_FLAG_TXE));

GPIO_SetBits(GPIOA, GPIO_Pin_4);
}

The SPI is set to work with 16 bits.

Checking the pins on oscilloscope (see picture attached with yellow for GPIOA 4, blue for SCLK, purple for MOSI), you can see GPIOA pin 4 going high before the second half word is fully sent.

Would someone know why the second TXE flag is set while transmitting the second half-word?

Thank you.

This topic has been closed for replies.
Best answer by waclawek.jan

Because SPI is double-buffered (i.e. there's a holding buffer and the shift-register itself - you can look at the holding buffer as a 1-frame FIFO) and TXE indicates emptyness of the holding buffer, not the shift register.

JW

5 replies

SebBAuthor
Associate
July 17, 2023

CS_early.jpg

waclawek.jan
waclawek.janBest answer
Super User
July 17, 2023

Because SPI is double-buffered (i.e. there's a holding buffer and the shift-register itself - you can look at the holding buffer as a 1-frame FIFO) and TXE indicates emptyness of the holding buffer, not the shift register.

JW

KnarfB
Super User
July 17, 2023

check the BSY busy flag instead.

hth

KnarfB

SebBAuthor
Associate
July 18, 2023

Thank you waclawek.jan, KnarfB

Piranha
Principal III
July 20, 2023

TXE flag must be checked/waited before writing to the sending register, not after!