SPI slave send and receive 1..n bytes - what if less bytes are sent?

[TecDroiD]

Hi,

i want to utilize an unknown number of SPI slaves which will send and receive e.g. a byte of data each. patching them together has to be as easy as plugging an ethernet cable BUT some data is used by multiple slaves.

Let's say I have a maximum of 32 possible slaves but currently, I only use 6 of them, so the master will only need to send 6 bytes. It pulls SS low, sends its bytes and pushes SS high again. Slaves have a send and a receive buffer with 32 bytes each.

So I'd like to know if (and how) it is possible to send/receive into the SPI buffers as long as SS is low. When SS goes high or the buffers are full, it should run a callback function to do my software magic.. Is this possible?

Simple workaround would be to send/receive data byte by byte but this would take much of my calculating power.

[waclawek.jan]

"Buffer" is already a software construct imposed upon you by Cube/HAL, so just simply don't use it.

SPI as such works on frames (single byte, halfword, in newer STM32 any number of bits between 4-16, according to SPI's setting). Read the SPI chapter in Reference Manual.

JW

[AScha.3]

just small update:

[waclawek.jan]

There's no reason to shout.

Yes, indeed, there are STM32 with SPI going up to 32 bits, but most of them don't. AFAIK only 'H7 and 'U5 do.

JW

[TecDroiD]

Well, thank you but that doesn't answer my question.

I want to enable my slaves which can work parallel to each other to receive all data sent BUT they don't know how many bytes there are.. only a maximum is sent. And my buffers are just arrays.. why shouldn't I use them? What else is HAL_SPI_TransmitReceive_DMA made for?

[S.Ma]

Which SPI topology multi-drop or daisy chain ?

[TecDroiD]

they're working in parallel.

My current idea is to call HAL_SPI_TransmitReceive_DMA() when CS goes low and when it goes up again, just abort the DMA if it's still running. Currently, it seems to work... mostly..

[S.Ma]

If you have 32 slaves and 1 NSS, beware of the bus loading (max bitrate) for both mutidrop and daisy chain mode (which is ADC/DAC type).

There is a tricky way to do daisy chain with fixed multiple bytes shift register, if this works for you. Otherwise better use DMA in cyclic mode with TX/RX buffer big enough to cover the biggest message. Use NSS to prepare/process the transited data into buffers.

Remember that in slave mode with DMA, there are some quirks to make it work ok.

[waclawek.jan]

> What else is HAL_SPI_TransmitReceive_DMA made for?

It's made for transmitting and receiving *fixed-length* data.

JW

[Tesla DeLorean]

What you send, ie how much, determines the clocking of the bus, so typically it is a symmetrical transaction, where you either stuff padding data, or ignore some coming back.

[waclawek.jan]

I believe the question was about SPI in slave mode.

JW

[S.Ma]

Slave mode to me would use a protocol so that first byte is packet length and if needed a packet counter and a checksum. The DMA in cyclic mode to TX/RX buffers. Interrupt at NSS rise edge to process the new payloads, if the goal is max bit rate with minimum SW time stretch during data transfer. Unfortunately, some SPI version with HW Fifo requires full SW reset to flush them, stretching the NSS high time...