SPI Slave NSS input not consistent
- March 25, 2021
- 2 replies
- 1279 views
So I'm having this weird bug I can't seem to figure out.
I'm trying to connect two stm32f4 discovery boards through SPI.
The master is sending out a SS signal I want to use to synchronize with the slave.
However for some reason before I send out a message the slave always registers some data input. I've tried to solve it using a different pin (PE6 instead of PA4), still the same problem remains.
The weird thing is I don't think there is some 'dip' on the SS line, because if I put a breakpoint at the data-read section and check the SS GPIO input register it reads '1' (as I would expect since the master isn't sending anything at this point). (I also tested if there was a falling edge on the SS line using a picoscope, it didn't detect any)
The attached screenshots show the difference between the read output (NSS_Input) and the one in the IDR register. The third one shows the setup of the SS pin as GPIO input
