SPI problem with hardware NSS management

[mudrovc]

Posted on October 26, 2009 at 04:22

SPI problem with hardware NSS management

#stm32f0 #metoo-maybe #nss #dma #spi

[mudrovc]

Posted on May 17, 2011 at 12:38

Hello. I'm using STM32F103C8. I'm trying to configure the SPI interfaces in MASTER mode with automatic NSS pin management by the hardware. This is the part of my code used for SPI configuration:

//Set GPIOs

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_7;

GPIO_Init(GPIOA, &GPIO_InitStructure);

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_15;

GPIO_Init(GPIOB, &GPIO_InitStructure);

//Enable clocks

RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2,ENABLE);

RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1,ENABLE);

//Init SPI structure

SPI_StructInit(&SPI_InitStructure);

SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;

SPI_InitStructure.SPI_Mode = SPI_Mode_Master;

SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;

SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;

SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;

SPI_InitStructure.SPI_NSS = SPI_NSS_Hard;

SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;

SPI_InitStructure.SPI_CRCPolynomial = 7;

SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;

//SPI1- for DAC and DP

SPI_Init(SPI1,&SPI_InitStructure);

SPI_SSOutputCmd(SPI1,ENABLE);

SPI_Cmd(SPI1,ENABLE);

//SPI2 - LCD

SPI_Init(SPI2,&SPI_InitStructure);

SPI_SSOutputCmd(SPI2,ENABLE);

SPI_Cmd(SPI2,ENABLE);

The problem is as follow:

The MOSI, MISO and SCLK pins functions normally. But the NSS pin stays always at zero. This is valid for both interfaces (SPI1 and SPI2). It's not a hardware problem (shortcut), because the NSS pin operates normally if configured like GPIO.

What I'm doing wrong?

[ This message was edited by: mudrovc on 27-06-2008 10:24 ]

[mudrovc]

Posted on May 17, 2011 at 12:38

Seems nobody knows :(

[jj_it]

Posted on May 17, 2011 at 12:38

Sorry - check example 4 in the SPI Library.

Noted that your function call ''order'' is different than that in the library. Look especially @ your placement of:

SPI_InitStructure.SPI_NSS = SPI_NSS_Hard;

[nj_boelskov]

Posted on May 17, 2011 at 12:38

I made a workaround. I am contolling the Slave Select by using it as a normal I/O port, and then using the Transmit buffer empty falg and the bussy flag.

I think that the NSS output is only used when you are dealing with Multimasters.

[mudrovc]

Posted on May 17, 2011 at 12:38

Quote:

On 30-06-2008 at 18:04, Anonymous wrote:

Sorry - check example 4 in the SPI Library.

Noted that your function call ''order'' is different than that in the library. Look especially @ your placement of:

SPI_InitStructure.SPI_NSS = SPI_NSS_Hard;

Hello jj.sprague.

Example 4 is M25P64_FLASH, the NSS hardware management is not used in this example at all. The only one example with hardware NSS management is in DMA folder. I made a compilation of the DMA example - on my MCU the NSS pin is not driven correctly again - it stays always at zero.

The ordering of the line SPI_InitStructure.SPI_NSS = SPI_NSS_Hard, should not have any sense - it's just a filling of the structure before calling SPI_Init(), i think. Am I right?

[ This message was edited by: mudrovc on 02-07-2008 09:27 ]

[ This message was edited by: mudrovc on 02-07-2008 09:28 ]

[nj_boelskov]

Posted on May 17, 2011 at 12:38

Hi

I have a problem like this.

I set the SPI to master internal by SSM and SSI, and I would like to operate the NSS pin, so it is high except when data is transmitted. But the NSS pin is always low :( The SSOE bit is set, means the NSS pin is output.

Where to finde the ''example 4 in the SPI Library''??

-Boelskov

[ This message was edited by: nj_boelskov on 02-07-2008 08:49 ]

[slawcus]

Posted on May 17, 2011 at 12:38

Example 4 was in older v1 firmware library. That example used simplex SPI with DMA and hardwire NSS. I just tested it with Rowley and transfer was successfull. I didn't check it with the scope, I just put breakpoint at the end where transfer ends.

In the new version (just downloaded it) is the same example located at

um0427.zip\FWLib\examples\SPI\DMA

Simple description of this example is also here:

http://www.st.com/stonline/products/literature/an/13649.pdf

[jj_it]

Posted on May 17, 2011 at 12:38

Two now report the inability to ''qualify'' SPI clock & data with SPIx_NSS.

I have a 250 board run coming next week - can't test/confirm your findings till then.

Have you tried all combinations of SSM & SSI in SPI-CR1? I was a tech writer in past-life - I'm not sure I understand the manual. You do report setting SSOE in SPI-CR2 - this is clearly written. Since it doesn't work have you tried clearing it - and then trying all SSM/SSI values? (sometimes brute force must replace logic)

*** just dawned on me - can't hurt to add 5-10K pull up R to NSS and see if this does the trick. (perhaps when in master mode the hw guys missed this)

It's frustrating that such a standard function - which works perfectly on much simpler micros - has thus far evaded our STM32... Inability to employ an ''automatic'' SPI_NSS signal really detracts from the 18MHz SPI transfer speed...

[ This message was edited by: jj.sprague on 03-07-2008 04:53 ]

[mudrovc]

Posted on May 17, 2011 at 12:38

Quote:

On 02-07-2008 at 13:37, Anonymous wrote:

I made a workaround. I am contolling the Slave Select by using it as a normal I/O port, and then using the Transmit buffer empty falg and the bussy flag.

I think that the NSS output is only used when you are dealing with Multimasters.

Yes this is a possibility, of course. But not works for me. I really need an automatic (by hardware) NSS pin management in master mode, since I want to use the DMA to transmit a big amounts of data to the slave device, without software intervention - So the NSS pin should be managed by the hardware itself. :(

[slawcus]

Posted on May 17, 2011 at 12:38

True, I just observed signals on the scope and NSS is always zero.