Setting up TIM8 strange issue

[BTrem.1]

Hi All,

I am setting up TIM8 CH1 and CH3 on a STM32G431 and am seeing a strange result. First of all, I am using an external signal coming in on PC6 TIM8 CH1. For TIM8 CH3 I am only using a software trigger internal to the MCU, I'm not using any external pin for TIM8 CH3. I am looking for a input capture on CH1 and CH3 only.

First. is this configuration okay for the G431?

When I enable TIM8 I immediately get SR bits set on : UIF, CC1F, CC2F, CC4F, CC1OF, CCI5 and CCI6. I expect the result for CC1F and CC1OF as CH1 input is active.

Is there something I need to do in initialization to make sure erroneous flags don't get set on an enable? Would any of these erroneous flags interfere with the DMA I have set up for CH1 and CH3?

Here is my TIM8 initialization code:

static void MX_TIM8_Init(void)
{
 TIM_ClockConfigTypeDef sClockSourceConfig = {0};
 TIM_MasterConfigTypeDef sMasterConfig = {0};
 TIM_IC_InitTypeDef sConfigIC = {0};
 //TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
 
 htim8.Instance = TIM8;
 htim8.Init.Prescaler = 170; 	// 1MHz
 htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
 htim8.Init.Period = 10000;		// 100Hz
 htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 if (HAL_TIM_Base_Init(&htim8) != HAL_OK) // enables timer in RCC register // what is HAL_TIM_IC_Init
 {
 Error_Handler();
 }
 sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
 if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
 {
 Error_Handler();
 }
 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; // added 4/30
 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
 {
 Error_Handler();
 }
 // next 18 lines added 4/30
 sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
 sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
 sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
 sConfigIC.ICFilter = 0;
 if (HAL_TIM_IC_ConfigChannel(&htim8, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
 {
 Error_Handler();
 }
 if (HAL_TIM_IC_ConfigChannel(&htim8, &sConfigIC, TIM_CHANNEL_3) != HAL_OK)
 {
 Error_Handler();
 }
}

Here is the code I use to start TIM8:

 // TIM8_CH1 is capture/compare from input pin and
 // TIM8_CH3 is capture/compare FW triggered by TIM8_EGR.CCG3
 // enable TIM8 DMA interrupts
 TIM8->DIER |= (TIM_DIER_CC3DE | TIM_DIER_CC1DE) ;
 	/* enable TIM8 capture / compare */
 TIM8->CCER |= ( TIM_CCER_CC1E | TIM_CCER_CC3E ) ;
	/* enable TIM8 */
 TIM8->CR1 |= TIM_CR1_CEN;

[waclawek.jan]

> When I enable TIM8 I immediately get SR bits set on : UIF, CC1F, CC2F, CC4F, CC1OF, CCI5 and CCI6. I expect the result for CC1F and CC1OF as CH1 input is active.

I dont' know what do you exactly mean by "when I enable TIM8" but CC channels which you don't set explicitly are by default set as Compare and their respective CCRx is 0, so when the counter is enabled (TIMx_CR1.CEN=1), the first time timer "goes around", those CCRx match CNT and the respective TIMx_SR.CCxIF is set (that's probably what you've meant by "CCxF" and "CCIx", as none of those exist). TIMx_SR.UF is set at that time, too; but probably it has been already set by the Cube/HAL function you use to set up ARR/PSC, as it generates Update explicitly by setting TIMx_EGR.UG.

So there's nothing "errorneous" in this behaviour, the timer works as described in RM.

> Would any of these erroneous flags interfere with the DMA I have set up for CH1 and CH3?

Channels, for which you don't set the respective TIMx_DIER.CCxDE bit, don't influence DMA. Additionally, in 'G4, each individual TIMx-originated DMA trigger signal has an individual input to the DMAMUX multiplexer, see Table 91. DMAMUX: assignment of multiplexer inputs to resources, so individual TIMx sources can't influence each other.

JW

[BTrem.1]

Thanks for the information. By "enable TIM8" I meant TIM8->CR1 |= TIM_CR1_CEN;

If those unused compare flags being set is not a problem then I will ignore them. Attached is a snapshot of the TIM8 SR register while debugging this.