Selecting pins for I2C1 and I2C2, if AF4 covers ''I2C1...3'' ?

[apullin]

Posted on March 16, 2018 at 16:56

Hi folks,

I am a little confused by the AF selection on some pins in the case of using multiple I2C's.

I am bringing up a new board where board I2C1 and I2C2 are being used on an F4 micro.

I2C1 is on PB6 & PB7, I2C2 is on PB9 & PB10.

Looking at the MCU manual, it shows for the GPIO AF multiplexer: 'AF4 (I2C1..3, I2CFMP1)'

If I set PB9 to AF4, how is there a distinction between the pin functioning for I2C1 or I2C2?

#i2c #gpio #f4

[waclawek.jan]

Posted on March 16, 2018 at 23:40

[apullin]

Posted on March 17, 2018 at 06:23

Thanks for the diagram. I don't think this exactly captured the point I was confused about, but nearly: if there was a wire from the I2C2_SDA node up to AF9 of PB9, that would reveal what I was missing.

[waclawek.jan]

Posted on March 17, 2018 at 10:02

if there was a wire from the I2C2_SDA node up to AF9 of PB9, that would reveal what I was missing.

Should you tell us the particular mcu model you had on your mind, I would have probably guessed what's the source of your confusion and I'd put that wire there.

'an F4 micro' for me is 'F405/'F407/'F415/'F17, as those were the first in the line, historically, and I am working with them a lot.

The crystal ball has its limitations, at least the cheapo model I am using  ;)

JW

[Tesla DeLorean]

Posted on March 17, 2018 at 03:00

The pin routing on individual pins is clearly shown in the Data Sheet tables. AF Mux on the pin is a 16-to-1 routing, I2C1 presumably has NO routing to PB9, where AF4 is connected to an I2C2 SDA node internally.

Each pin has its own MUX, each mux connects to different NODES.

[apullin]

Posted on March 17, 2018 at 06:20

 ,

 ,

Aha.

 ,

So my confusion was partly from using an old version of the ST libraries, which ,has a section of the gpio header with:

♯ define

GPIO_AF_I2C1

((

uint8_t

)

0x04

)

/* I2C1 Alternate Function mapping */

♯ define

GPIO_AF_I2C2

((

uint8_t

)

0x04

)

/* I2C2 Alternate Function mapping */

♯ define

GPIO_AF_I2C3

((

uint8_t

)

0x04

)

/* I2C3 Alternate Function mapping */

That confused me, so looking at the manual, I saw that indeed AF4 was allocated for I2C1..3. But what I missed was that AF9 is also a candidate for I2C1..3 connections.

Now that I look into the actual pin function matrix in the device datasheet per your recommendation, I do see that for PB9, AF4 = I2C1_SDA, but AF9 = I2C2_SDA , for PB9.

 ,

Which led me to check further in st32f4xx_gpio.h, and sure enough, it has:

♯ define

GPIO_AF9_I2C2

((

uint8_t

)

0x09

)

/* I2C2 Alternate Function mapping (Only for STM32F401xx/STM32F410xx/STM32F411xE/STM32F412xG/STM32F413_423xx Devices) */

♯ define

GPIO_AF9_I2C3

((

uint8_t

)

0x09

)

/* I2C3 Alternate Function mapping (Only for STM32F401xx/STM32F411xE/STM32F412xG and STM32F413_423xx Devices) */

So I just had to be cognizant of heterogenous ,mappings for the pin muxes, and make the right choices for my project using the old ST libraries.

 ,

Generating a minimum working example using CubeMX, it does correctly select the pin-specific AF value:

GPIO_InitStruct.

Alternate

=

GPIO_AF9_I2C2,

I swear, 'It was right there in the damn datasheet' is going to be the quote on my tombstone ... ,