SDRAM config and limitations for STM32F746G-DISCO when running at 216MHz

[Iulian Malai]

Posted on April 25, 2017 at 15:47

Hello everyone,

I'm working on a project for the STM32F746G-DISCO board. The system clock is set to 200MHz as in the majority of the examples provided with the STM32F7Cube. I want to switch to 216MHz, maximum for this board.

1. Can someone tell if there is any limitation for this board when using the maximum frequency(e.g. for peripherals like USB, SDRAM)?

2. It seems that I have problems with the SDRAM configuration(file system_stm32f7xx.c, function SystemInit_ExtMemCtl()) when the system clock is set to 216MHz and there is no example in the STM32F7Cube using the SDRAM and the maximum frequency. Can someone from ST provide the right configuration for this case?

Thank you in advance,

Iulian

[Tesla DeLorean]

Posted on April 25, 2017 at 17:13

For SDRAM you need to review the part specs, and adjust the timing parameters to fit your clocking scheme. If it says a signal needs a 20ns pulse you have figure out how many cycles of the 200 or 216 MHz clock you need to get at least that.

If it needs a 16 or 64 ms refresh, you have to work out how many rows you have to touch, and how many clock cycles between each to achieve that.

It starts by reading the data sheet and ratioing the numbers appropriately. Takes time and effort, but isn't unduly complicated.

[Iulian Malai]

Posted on April 26, 2017 at 09:24

Thank you for your response Clive. I have already tried to adjust the timing parameters using the MT48LC4M32B2 SDRAM datasheet, but I still have some bus faults. In the SystemInit_ExtMemCtl() function we also configure the pins for the FMC controller. It's quite complex so that's why I would like to know if ST has a working SDRAM configuration for the 216 MHz system clock.