SDRAM Chip Select & Clock Enable connections in STM32H750

[Ahamed Faize]

Hi team,

We are using STM32H750 MCU in our design. We are interfacing an SDRAM memory to the MCU using FMC. But we have doubt on the SDRAM chip select & clock enable signals. We are planning to use FMC_SDNE0 & FMC_SDCKE0. But In Discovery kit, FMC_SDNE1 & FMC_SDCKE1 is used. So We have doubt such that Whether we should use the FMC_SDNE1 & FMC_SDCKE1 or whether we can use either 0 or 1, based on the pin availability?

Please clarify the above queries.

Regards,

Ahamed Faize

[waclawek.jan]

The two pairs of NE/CKE correspond to the two SDRAM banks, which are mapped to two address areas. Read the initial subchapters and SDRAM subchapter of FMC chapter in RM.

JW

[Ahamed Faize]

Hi Jan,

Thanks.

I will go through the RM. I concluded from your answer is as below,

We can use either NE0/CKE0 or NE1/CKE1 if we are using single chip. But When we are using two chips, then NE0/CKE0 will be used for one device & NE1/CKE1 will be used for another device.

Just clarify me, Whether NE/CKE has to be used based on "No. of Banks" or "No. of Chips".

Regards,

Ahamed Faize