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unparagoned
Associate II
June 26, 2012
Question

SDIO can't read more than 511 blocks

  • June 26, 2012
  • 3 replies
  • 975 views
Posted on June 26, 2012 at 22:41

I'm using the standard STM libaries. I'm using SDIO with DMA. It works perfectly when reading up to 511 blocks but as soon as I try and read 512 blocks it stops working. It would successfully transfer 511 blocks then stop and become non-responsive. It seems like I must be missing something obvious due to the number of blocks it stops on. I looked at the varaibles used and registers but 512 blocks of 512 bytes doesn't seem like it would overun any of them.

I guess the relevant code is below. Where if

NumberOfBlocks

is above 511 it stops working.

 SDIO_DataInitStructure.

SDIO_DataTimeOut

= SD_DATATIMEOUT;

SDIO_DataInitStructure.

SDIO_DataLength

= NumberOfBlocks * BlockSize;

SDIO_DataInitStructure.

SDIO_DataBlockSize

= (

uint32_t

) 9 << 4;

SDIO_DataInitStructure.

SDIO_TransferDir

= SDIO_TransferDir_ToSDIO;

SDIO_DataInitStructure.

SDIO_TransferMode

= SDIO_TransferMode_Block ;

SDIO_DataInitStructure.

SDIO_DPSM

= SDIO_DPSM_Enable;

SDIO_DataConfig

(&SDIO_DataInitStructure);

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    3 replies

    Tesla DeLorean
    Guru
    June 26, 2012
    Posted on June 26, 2012 at 23:01

    Not really rocket science here, but a quick back of the envelope yields

    512 x 512 = 262144 (256KB)

    DMA length count 16-bit units, max data transfer width 32-bits

    65535 * 4 = 262140

    The cards might well throw in additional limits.

    You might be able to handle more by chaining DMA transfers at TC.

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    unparagoned
    Associate II
    June 27, 2012
    Posted on June 27, 2012 at 20:33

    Thanks clive1 I knew it would be fairly obvious once I knew where to look but was looking in the wrong place. I was looking at the SDIO limits rather than DMA. Thanks.

    Tesla DeLorean
    Guru
    June 27, 2012
    Posted on June 27, 2012 at 21:51

    Personally I think having 16-bit counters and timers on a 32-bit micro is a bit of a cop-out.

    I suppose having ridiculously large DMA transfers could be problematic, the limit should at least be able to act on the entire external memory buffer space.

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