Restriction on the use of Port Pins PC13..PC15

[edware]

Posted on March 04, 2008 at 16:19

Restriction on the use of Port Pins PC13..PC15

[edware]

Posted on May 17, 2011 at 12:25

According to RM0008,

Quote:

Due to the fact that the switch only sinks a limited amount of current, the use of GPIOs PC13 to PC15 is restricted: only one I/O at a time can be used as an output, the speed has to be limited to 2 MHz with a maximum load of 30 pF and these IOs must not be used as a current source (e.g. to drive an LED).

In our application, we have Vbat tied to VDD and PC13 to PC15 pins are unused, and not connected. Is it problematic to configure these pins as outputs with a logic 0? (as we do with our other unused I/O pins). Given the pin loading would be zero, it would seem possible. The strict interpretation of the data sheet would suggest not however.

Cheers

Ed

[16-32micros]

Posted on May 17, 2011 at 12:25

Dear Edware,

Leaving them Open (not connected) is the right configuration. and if you you like to reduce power consumption on run-time just enable them as push-pull with static 0.

The Limitation described in you post is more detailed here

http://www.st.com/mcu/forums-cat-6217-23.html

. Hope this helps you.

Cheers,

STOne-32