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Associate III
June 19, 2024
Solved

RAMCFG_MxCR ECCE bit not set even after SRAMxECC is enabled(0) in FLASH_OPTR

Hi,

I have enabled option bit SRAMxECC is in FLASH_OPTR by following sequence mentioned in datasheet to enable SRAM ECC, However RAMCFG_MxCR ECCE still shows as 0(disabled). Please do the needuful.

harisuvarna_0-1718831916888.png

 

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harisuvarnaBest answer
Associate III
June 24, 2024

ECCE bit in register RAMCFG is setting to 1 after I enable clock for RAMCFG module in RCC register 

harisuvarna_0-1719245070771.png

Thanks,

Hareesha

3 replies

ST Technical Moderator
June 21, 2024

Hello @harisuvarna 

Check the STM32U5 Errata, you may have the same condition described in section: SRAM ECC error flags and addresses are updated only if interrupt is enabled.

ImenD_0-1719000893783.png

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. Thanks
Associate III
June 21, 2024

Hi Iman,

Thank you for the response. I do enable RAM ECC interrupts in register RAMCFG_MxIER.  

Section 6.3.2 of ST User Manual (RM0456) says following

harisuvarna_0-1719004750896.png

But ECCE bit is not automatically set even though SRAM ECC is enabled in FLASH_OPTR. 

Regards,

Hareesha

 

harisuvarnaAuthorBest answer
Associate III
June 24, 2024

ECCE bit in register RAMCFG is setting to 1 after I enable clock for RAMCFG module in RCC register 

harisuvarna_0-1719245070771.png

Thanks,

Hareesha