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Associate III
October 28, 2024
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Question about HAL_SPI_TransmitReceive timeout

  • October 28, 2024
  • 7 replies
  • 2289 views

Question about HAL_SPI_TransmitReceive timeout.

Currently, a timeout occurs when calling HAL_SPI_TransmitReceive in our program. (We are the master)

What are some of the factors that cause a timeout in HAL_SPI_TransmitReceive?

This topic has been closed for replies.
Best answer by Andrew Neil

Same question here:

https://community.st.com/t5/stm32-mcus-products/question-about-hal-spi-transmitreceive-timeout/td-p/736691

Threads merged.

 

Please see the Posting Tips for how to properly post source code:

https://community.st.com/t5/community-guidelines/how-to-write-your-question-to-maximize-your-chances-to-find-a/ta-p/575228

 


@pass3master wrote:

Why would a timeout occur just by changing the size?


Obviously, the larger the transfer size, the longer it will take to complete 

 

Use an oscilloscope or logic analyser to see what is actually happening on the wires 

7 replies

Associate III
October 29, 2024

Regarding the problem of timeout when performing HAL_SPI_TransmitReceive with different sizes in succession

We are handling as follows
(CS operation and SPI CLK Enable processing are omitted)
①HAL_SPI_TransmitReceive(&hspi1, data, rxbuf, 4, 1000)
HAL_SPI_TransmitReceive(&hspi1, data2, rxbuf2, 23, 1000)

For some reason, a timeout occurs in the middle of data2 transmission (4th byte).
Why does it time out? It seems that the Size setting in (1) has been taken over, but I do not know how it works.

 

[Supplemental] If HAL_SPI_Init is performed between ① and ②, the timeout will not occur.

Tesla DeLorean
Guru
October 29, 2024

The SPI peripheral clock isn't enabled? Timeout is shorter than the buffer length and clock speed.

Check the SPIx register content

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Associate III
October 29, 2024

Thank you for your response.
The SPI peripheral clock is enabled.
The timeout time is appropriate. Are there any other reasons that could cause a timeout?
If the SPI module crashes during SPI communication, will it cause a timeout?

Tesla DeLorean
Guru
October 29, 2024

All the source code for the library is provided, and you can always use the debugger to understand why data doesn't clock out, or clock back in.

I've got no visibility into your code, or the registers in the STM32

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Associate III
October 30, 2024

Regarding the problem that SPI communication times out in the middle of the communication

When SPI communication is performed as shown below, a timeout occurs in the ← section.
I think that HAL_SPI_TransmitReceive just before the timeout is affected, but I don't know why.
Why would a timeout occur just by changing the size?

/* SPI_CS High */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_SET);

__HAL_SPI_ENABLE(&hspi1);

/* SPI_CS Low */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET);

g_result = HAL_SPI_Transmit(&hspi1, spi_txdata2, 4, 1000);

__HAL_SPI_DISABLE(&hspi1);

/* SPI_CS High */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_SET);

__HAL_SPI_ENABLE(&hspi1);

/* SPI_CS Low */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_RESET);

g_result = HAL_SPI_Transmit(&hspi1, spi_txdata2, 20, 1000); ←

/* SPI_CS High */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_10, GPIO_PIN_SET);

Andrew Neil
Andrew NeilBest answer
Super User
October 30, 2024

Same question here:

https://community.st.com/t5/stm32-mcus-products/question-about-hal-spi-transmitreceive-timeout/td-p/736691

Threads merged.

 

Please see the Posting Tips for how to properly post source code:

https://community.st.com/t5/community-guidelines/how-to-write-your-question-to-maximize-your-chances-to-find-a/ta-p/575228

 


@pass3master wrote:

Why would a timeout occur just by changing the size?


Obviously, the larger the transfer size, the longer it will take to complete 

 

Use an oscilloscope or logic analyser to see what is actually happening on the wires 

A complex system that works is invariably found to have evolved from a simple system that worked.A complex system designed from scratch never works and cannot be patched up to make it work.