QuadSPI hangs with BUSY after 4 GB indirect read

[jpa]

I'm using QuadSPI in indirect dual-flash read mode to transfer data from an external chip (not flash memory). According to reference manual, when FSIZE = 0x1F and DLR = 0xFFFFFFFF, the transfer should continue indefinitely.

However, with STM32H743ZIT6 revision V, the transfer seems to terminate once 4 GB has been transferred. After that the QUADSPI SR register remains at value 0x22 and no DMA requests get triggered. If I try to read QUADSPI DR directly at this point, it hangs the whole processor.

If I then set the ABORT bit in QUADSPI CR, clear it, and set CCR again to start a new transfer everything works again for another 4 GB.

However the pause between first and second transfer causes interruption that I do not want.

Is there an example on how to use the infinite transfer mode mentioned in the reference manual? Here's my current code:

QUADSPI->DCR = QUADSPI_DCR_FSIZE_Msk;
 QUADSPI->DLR = 0xFFFFFFFF;
 QUADSPI->CR = (0 << QUADSPI_CR_PRESCALER_Pos) | QUADSPI_CR_DFM | (15 << QUADSPI_CR_FTHRES_Pos) | QUADSPI_CR_EN;
 
 // Writing CCR will start the transfer
 QUADSPI->CCR = QUADSPI_CCR_DDRM | (1 << QUADSPI_CCR_FMODE_Pos) | (3 << QUADSPI_CCR_DMODE_Pos) | (2 << QUADSPI_CCR_DCYC_Pos);

I have tested that disabling DFM (dual flash mode) and DDRM (double data rate mode) makes no difference.