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BBute.1
Associate II
January 26, 2023
Solved

QSPI nCS behavior on STM32H747

  • January 26, 2023
  • 1 reply
  • 2331 views

Hello,

I am facing an issue with nCS pin of QSPI on STM32H747BIT.

Reference manual indicates that SCLK is supposed to wait one period after nCS fall before starting operations :

0693W00000Y9DHOQA3.pngBut I do not observe this wait on my board.

*Yellow is the clock

*Blue is the nCS signal

0693W00000Y9DIlQAN.png0693W00000Y9DIbQAN.pngHere is my QSPI configuration :

 hqspi.Instance = QUADSPI;
 hqspi.Init.ClockPrescaler = 111;
 hqspi.Init.FifoThreshold = 32;
 hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_NONE;
 hqspi.Init.FlashSize = 21;
 hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
 hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
 hqspi.Init.FlashID = QSPI_FLASH_ID_2;
 hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;

Then I use the following commands to communicate with my peripheral (APS6404L-SQH QSPI PSRAM) :

HAL_QSPI_Command(&hqspi, &APS_QSPI_Command, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);
HAL_QSPI_Receive(&hqspi,buffer,HAL_QSPI_TIMEOUT_DEFAULT_VALUE) ;

The small wait period I saw with scope seems to decrease when clock frequency increase.

This behavior does not prevent me from using my peripheral with a clock lower or equal to 20MHz. But I cannot increase the clock frequency whereas the peripheral is supposed to run up to 144MHz.

It is possible that routing is not good enough to handle higher frequencies, but the behavior I saw doe not seem to match the specification.

What did I miss?

This topic has been closed for replies.
Best answer by BBute.1

My mistake, if it can help anyone, I forgot to set pin speed to Very High with OSPEEDR registers.

With very high-speed Clock signal waits one period before any operation as expected.

1 reply

BBute.1
BBute.1AuthorBest answer
Associate II
January 26, 2023

My mistake, if it can help anyone, I forgot to set pin speed to Very High with OSPEEDR registers.

With very high-speed Clock signal waits one period before any operation as expected.