QSPI dual flash - addressing
I'm porting a QSPI bootloader over from a design that 1 flash chip to 2 flash chips in parallel (10 bit mode, common CS). I am not sure how the addressing works now that there are 2 chips in parallel. I feel like the only thing STM32 says on the matter is in AN4760 in that even bytes goto one flash 1 and odd bytes goto the flash 2.
If I have something that is addressed at 0x1000 internally by the STM32, when sending QSPI commands to write or erase to the QSPI do I need to double the address (to 0x2000) first? Or does the QSPI interface in the STM32 already do that for me?
